DSPIC30F2010-20I/SP Microchip Technology, DSPIC30F2010-20I/SP Datasheet - Page 3

• Manufacturer Part Number: DSPIC30F2010-20I/SP
• Description: IC DSPIC MCU/DSP 12K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20I/SP

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 20
• Data Ram Size: 512 B
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F2010-20I/SPG; DSPIC30F201020ISG; DSPIC30F201020ISG; DSPIC30F201020ISP

High Performance Modified RISC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set architecture
• 84 base instructions with flexible addressing
• 24-bit wide instructions, 16-bit wide data path
• 12 Kbytes on-chip Flash program space
• 512 bytes on-chip data RAM
• 1 Kbyte non-volatile data EEPROM
• 16 x 16-bit working register array
• Up to 30 MIPs operation:
• Up to 42 interrupt sources
• Three external interrupt sources
DSP Engine Features:
• Modulo and Bit-Reversed modes
• Two, 40-bit wide accumulators with optional
• 17-bit x 17-bit single cycle hardware fractional/
• Single cycle Multiply-Accumulate (MAC) operation
• 40-stage Barrel Shifter
• Dual data fetch
 2004 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the dsPIC30F Family Reference
Manual (DS70046). For more information on the device
instruction set and programming, refer to the dsPIC30F
Programmer’s Reference Manual (DS70030).
modes
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
- 8 user selectable priority levels
- 54 interrupt vectors
- 8 processor exceptions and software traps
saturation logic
integer multiplier
PLL active (4x, 8x, 16x)
28-pin dsPIC30F2010 Enhanced Flash
16-bit Digital Signal Controller
Preliminary
Peripheral Features:
• High current sink/source I/O pins: 25 mA/25 mA
• Three 16-bit timers/counters; optionally pair up
• Four 16-bit Capture input functions
• Two 16-bit Compare/PWM output functions
• 3-wire SPI
• I
• Addressable UART modules with FIFO buffers
Motor Control PWM Module Features:
• 6 PWM output channels
• 4 duty cycle generators
• Dedicated time base with 4 modes
• Programmable output polarity
• Dead time control for Complementary mode
• Manual output control
• Trigger for synchronized A/D conversions
Quadrature Encoder Interface Module
Features:
• Phase A, Phase B and Index Pulse input
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Interrupt on position counter rollover/underflow
Analog Features:
• 10-bit Analog-to-Digital Converter (A/D) with:
• Programmable Brown-out Detection and Reset
16-bit timers into 32-bit timer modules
- Dual Compare mode available
and 7-bit/10-bit addressing
- Complementary or Independent Output
- Edge and Center Aligned modes
- 500 Ksps (for 10-bit A/D) conversion rate
- Six input channels
- Conversion available during Sleep and Idle
generation
2
dsPIC30F2010
C
modes
TM
module supports Multi-Master/Slave mode
TM
modules (supports 4 Frame modes)
DS70118D-page 1