DSPIC30F2010-20I/SP Microchip Technology, DSPIC30F2010-20I/SP Datasheet - Page 15

• Manufacturer Part Number: DSPIC30F2010-20I/SP
• Description: IC DSPIC MCU/DSP 12K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20I/SP

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 20
• Data Ram Size: 512 B
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F2010-20I/SPG; DSPIC30F201020ISG; DSPIC30F201020ISG; DSPIC30F201020ISP

2.4
The DSP engine consists of a high speed 17-bit x
17-bit multiplier, a barrel shifter, and a 40-bit adder/
subtractor (with two target accumulators, round and
saturation logic).
The DSP engine also has the capability to perform inher-
ent
require no additional data. These instructions are ADD,
SUB and NEG.
TABLE 2-2:
 2004 Microchip Technology Inc.
accumulator-to-accumulator
DSP Engine
Instruction
MOVSAC
MPY.N
EDAC
MAC
MAC
MPY
MSC
CLR
ED
DSP INSTRUCTION SUMMARY
operations,
which
Algebraic Operation
Preliminary
A = 0
A = (x – y)
A = A + (x – y)
A = A + (x * y)
A = A + x
No change in A
A = x * y
A = – x * y
A = A – x * y
2
The DSP engine has various options selected through
various bits in the CPU Core Configuration Register
(CORCON), as listed below:
1.
2.
3.
4.
5.
6.
7.
A block diagram of the DSP engine is shown in
Figure 2-2.
2
Note:
2
Fractional or integer DSP multiply (IF).
Signed or unsigned DSP multiply (US).
Conventional or convergent rounding (RND).
Automatic saturation on/off for AccA (SATA).
Automatic saturation on/off for AccB (SATB).
Automatic saturation on/off for writes to data
memory (SATDW).
Accumulator
(ACCSAT).
For CORCON layout, see Table 4-2.
dsPIC30F2010
Saturation
mode
ACC WB?
DS70118D-page 13
Yes
Yes
Yes
Yes
No
No
No
No
No
selection