M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 370

• Manufacturer Part Number: M30833FJGP#U3
• Description: IC M32C/83 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 87
• Interface Type: UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
3
. v
J
Figure 22.19 C0GMR3, C0LMAR3 and C0LMBR3 Registers and
2
0
C
1
9
3 .
B
8 /
0
1
3
0
3
J
G
CAN0 Global Mask Register Extended ID1
CAN0 Local Mask Register A Extended ID1
CAN0 Local Mask Register B Extended ID1
4
CAN0 Global Mask Register Extended ID2
CAN0 Local Mask Register A Extended ID2
CAN0 Local Mask Register B Extended ID2
a
b7
b7
o r
0 -
n
NOTES:
NOTES:
3 .
1
u
b6
b6
, 1
3
p
1. This register can be accessed when the BANKSEL bit in the C0CTLR1 register is set to "1".
2. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) and
3. The C0LMAR3 register shares the same address with the C0MCTL3 register.
4. The C0LMBR3 register shares the same address with the C0MCTL11 register.
1. This register can be accessed when the BANKSEL bit in the C0CTLR1 register is set to "1".
2. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) and
3. The C0LMAR4 register shares the same address with the C0MCTL4 register.
4. The C0LMBR4 register shares the same address with the C0MCTL12 register.
1
b5
(
b5
2
supplying a clock to the CAN module after reset.
C0GMR4, C0LMAR4 and C0LMBR4 Registers
M
supplying a clock to the CAN module after reset.
0
0
3
b4
b4
6
2
C
b3
b3
8 /
Page 345
b2
, 3
b2
M
b1
b1
3
b0
2
b0
C
f o
8 /
EID10M
EID11M
EID13M
(b7 - b6)
EID12M
Symbol
Symbol
EID6M
EID7M
EID8M
EID9M
EID2M
EID0M
EID1M
EID3M
EID4M
EID5M
4
3
Bit
Bit
8
) T
Symbol
C0GMR3
C0LMAR3
C0LMBR3
Symbol
C0GMR4
C0LMAR4
C0LMBR4
8
Extended ID6
Extended ID7
Extended ID8
Extended ID9
Extended ID10
Extended ID11
Extended ID13
Extended ID2
Extended ID12
Extended ID0
Extended ID1
Extended ID3
Extended ID4
Extended ID5
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Bit Name
Address
022C
0234
023C
Address
022B
0233
023B
16 (3)
16
16
(4)
16
16
16
(3)
(4)
0: No ID is checked
1: ID is checked
(1)
0: No ID is checked
1: ID is checked
(1)
(1)
(1)
(1)
(1)
After Reset
00
00
00
After Reset
XX00 0000
XX00 0000
XX00 0000
Function
Function
16
16
16
(2)
2
2
2
(2)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
22. CAN Module