M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 337

• Manufacturer Part Number: M30833FJGP#U3
• Description: IC M32C/83 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 87
• Interface Type: UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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NOTES:
NOTES:
NOTES:
NOTES:
Table 21.32 Pin Settings (1)
Table 21.33 Pin Settings (2)
Table 21.34 Pin Settings (3)
Table 21.35 Pin Settings (4)
9 0
C
Name
Name
. 1
Name
Port
Port
Port
P13
P13
P13
P6
1. P7
2. Set the MOD2 to MOD0 bits in the corresponding register to "111
P9
P9
1. Set the PD9 and PS3 registers immediately after the PRC2 bit in the PRCR register is set to "1" (write
2. Set the MOD2 to MOD0 bits in the corresponding register to "111
1. Set the MOD2 to MOD0 bits in the corresponding register to "111
1. Set the MOD2 to MOD0 bits in the corresponding register to "111
8 /
B
Name
1 3
Port
P7
P7
0
3
4
function is used).
1
2
enable). Do not generate an interrupt or a DMA transfer between the instruction to set to the PRC2 bit to "1"
and the instruction to set the PD9 and PS3 registers.
function used).
function used).
function used).
3 0
4
5
6
0 (1)
1
G
J
- 4
n a
0
o r
ISRxD2 input
ISTxD2 output
ISCLK2 input
ISCLK2 output PS0_4 = 1
ISTxD2 output
ISRxD2 input
ISCLK2 input
ISCLK2 output PS7_6 = 1
1 0
is a port for the N-channel open drain output.
3 .
u
p
, 1
1 3
Function
Function
Function
ISTxD2 output PS1_0 = 1
ISRxD2 input
(
0 2
M
Function
3
6 0
2
C
8 /
Page 312
, 3
PS3 Register
PS3_1=0
PS3_2=1
PS0 Register PSL0 Register PD6 Register IPS Register
PS0_4 = 0
PS7 Register PD13 Register IPS Register
PS7_4 = 1
PS7_5 = 0
PS7_6 = 0
M
3
PS1 Register PSL1 Register PSC Register PD7 Register IPS Register
PS1_1 = 0
2
C
f o
8 /
4
3
8 8
) T
(1)
PSL3 Register PD9 Register
-
PSL0_4 = 1
-
PD13_5 = 0
PD13_6 = 0
-
PSL3_2=1
Bit and Setting
-
PSL1_0 = 0
-
Bit and Setting
Bit and Setting
PD9_1=0
-
PD6_4 = 0
-
-
IPS5 to 4 = 10
IPS6 = 1
-
Bit and Setting
PSC_0 = 1
-
21. Intelligent I/O (Group 2 Communication Function)
(1)
2
IPS6 = 0
-
IPS5 to 4=01
-
PD7_1 = 0
IPS Register
-
G2POCR0
G2POCR1
-
-
Register
2
2
2
2
" (output of the communication
" (output of the communication
" (output of the communication
" (output of the communication
(1)
2
-
IPS5 to 4 = 00
Register
-
G2POCR1
-
G2POCR0
Register
(1)
(2)
2
G2POCR0
-
Register
(2)