HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 266

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 3 Processing States
3.4
This is a state in which the bus has been released in response to a bus request from a bus master
other than the CPU. While the bus is released, the CPU halts except for internal operations. For
further details, refer to the relevant microcontroller hardware manual.
3.5
When the RES input goes low all current processing stops and the CPU enters the reset state. The I
bit in the condition-code register is set to 1 by a reset. All interrupts are masked in the reset state.
Reset exception handling starts when the RES signal changes from low to high.
3.6
In the power-down state the CPU stops operating to conserve power. There are three modes: sleep
mode, software standby mode, and hardware standby mode. For details, refer to the relevant
microcontroller hardware manual.
3.6.1
A transition to sleep mode is made if the SLEEP instruction is executed while the software
standby bit (SSBY) is cleared to 0.
CPU operations stop immediately after execution of the SLEEP instruction. The contents of CPU
registers are retained.
3.6.2
A transition to software standby mode is made if the SLEEP instruction is executed while the
SSBY bit is set to 1.
The CPU and clock halt and all on-chip supporting modules stop operating. The on-chip
supporting modules are reset, but as long as a specified voltage is supplied the contents of CPU
registers and on-chip RAM are retained. The I/O ports also remain in their existing states.
Rev. 3.00 Dec 13, 2004 page 250 of 258
REJ09B0213-0300
For further details, refer to the relevant microcontroller hardware manual.
Bus-Released State
Reset State
Power-Down State
Sleep Mode
Software Standby Mode