HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 20

IC H8 MCU FLASH 56K 64LQFP

HD64F3687GFPV

Manufacturer Part Number
HD64F3687GFPV
Description
IC H8 MCU FLASH 56K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3687GFPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Package
64LQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
45
Interface Type
I2C/SCI
On-chip Adc
8-chx10-bit
Number Of Timers
3
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3687GFPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3687GFPV
Manufacturer:
RENESAS
Quantity:
1 000
Section 1 CPU
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses
an 8-bit absolute address to specify a memory operand that contains a branch address. In normal
mode the operand is a 16-bit word operand, providing a 16-bit branch address. Branch addresses
can be stored in the top area from H'0000 to H'00FF. Note that this area is also used for the
exception vector table.
Stack Structure: When the program counter (PC) is pushed on the stack in a subroutine call, and
the PC and condition-code register (CCR) are pushed on the stack in exception handling, they are
stored in the same way as in the H8/300 CPU. See figure 1.3.
Rev. 3.00 Dec 13, 2004 page 4 of 258
REJ09B0213-0300
SP
Note: * Ignored at return.
(a) Subroutine branch
H'0000
H'0001
H'0002
H'0003
H'0004
H'0005
H'0006
H'0007
H'0008
H'0009
Figure 1.2 Exception Vector Table (normal mode)
(16 bits)
PC
Figure 1.3 Stack Structure (normal mode)
Reserved for system use
Reset exception vector
Exception vector 1
Exception vector 2
SP
(b) Exception handling
Exception
vector table
(16 bits)
CCR*
CCR
PC

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