HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 19

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

1.2
The H8/300H CPU has two operating modes: normal and advanced. Normal mode supports a
maximum 64-kbyte address space. Advanced mode supports up to 16 Mbytes. The mode is
selected at the mode pins of the microcontroller. For further information, refer to the relevant
hardware manual.
(1) Normal Mode
The exception vector table and stack have the same structure as in the H8/300 CPU.
Address Space: A maximum address space of 64 kbytes can be accessed, as in the H8/300 CPU.
Extended Registers (En): The extended registers (E0 to E7) can be used as 16-bit data registers,
or they can be combined with the general registers (R0 to R7) for use as 32-bit data registers.
When En is used as a 16-bit register it can contain any value, even when the corresponding
general register (R0 to R7) is used as an address register. If the general register is referenced in the
register indirect addressing mode with pre-decrement (@–Rn) or post-increment (@Rn+) and a
carry or borrow occurs, however, the value in the corresponding extended register will be affected.
Instruction Set: All additional instructions and addressing modes of the H8/300 CPU can be
used. If a 24-bit effective address (EA) is specified, only the lower 16 bits are used.
Exception Vector Table and Memory Indirect Branch Addresses: In normal mode the top area
starting at H'0000 is allocated to the exception vector table. One branch address is stored per 16
bits (figure 1.2). The exception vector table differs depending on the microcontroller, so see the
microcontroller hardware manual for further information.
CPU operating modes
CPU Operating Modes
Figure 1.1 CPU Operating Modes
Advanced mode
Normal mode
Rev. 3.00 Dec 13, 2004 page 3 of 258
Maximum 16 Mbytes, program
and data areas combined
Maximum 64 kbytes, program
and data areas combined
REJ09B0213-0300
Section 1 CPU