HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 11

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1
1.1
1.2
1.3
1.4
1.5
1.6
Section 2
2.1
2.2
Overview ...........................................................................................................................
1.1.1
1.1.2
CPU Operating Modes ......................................................................................................
Address Space ...................................................................................................................
Register Configuration ......................................................................................................
1.4.1
1.4.2
1.4.3
1.4.4
Data Formats ..................................................................................................................... 12
1.5.1
1.5.2
Instruction Set ................................................................................................................... 15
1.6.1
1.6.2
1.6.3
1.6.4
1.6.5
Tables and Symbols........................................................................................................... 35
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
2.1.6
Instruction Descriptions .................................................................................................... 41
2.2.1 (1)
2.2.1 (2)
2.2.1 (3)
2.2.2
2.2.3
2.2.4 (1)
2.2.4 (2)
CPU
Features ................................................................................................................
Differences from H8/300 CPU.............................................................................
Overview ..............................................................................................................
General Registers .................................................................................................
Control Registers.................................................................................................. 10
Initial Register Values .......................................................................................... 11
General Register Data Formats ............................................................................ 12
Memory Data Formats ......................................................................................... 14
Overview .............................................................................................................. 15
Instructions and Addressing Modes ..................................................................... 16
Tables of Instructions Classified by Function ...................................................... 18
Basic Instruction Formats..................................................................................... 26
Addressing Modes and Effective Address Calculation ........................................ 28
Instruction Descriptions
Assembler Format ................................................................................................ 36
Operation.............................................................................................................. 37
Condition Code .................................................................................................... 38
Instruction Format ................................................................................................ 38
Register Specification........................................................................................... 39
Bit Data Access in Bit Manipulation Instructions ................................................ 40
ADD (B) .......................................................................................................... 42
ADD (W) ......................................................................................................... 43
ADD (L) .......................................................................................................... 44
ADDS .............................................................................................................. 45
ADDX ............................................................................................................. 46
AND (B) .......................................................................................................... 47
AND (W) ......................................................................................................... 48
....................................................................................................................
Contents
................................................................................ 35
Rev. 3.00 Dec 13, 2004 page ix of xiv
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