HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 191

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.56 (3) SHLR (L)
Notes
SHLR (SHift Logical Right)
Operation
ERd (right logical shift)
Assembly-Language Format
SHLR.L ERd
Operand Size
Longword
Description
This instruction shifts the bits in a 32-bit register ERd (destination operand) one bit to the right.
The least significant bit shifts into the carry flag. The most significant bit (bit 31) is cleared to 0.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Register direct
Addressing
Mode
Mnemonic
0
SHLR.L
MSB
b
ERd
31
Operands
ERd
. . . . . .
1st byte
1
1
Condition Code
H: Previous value remains unchanged.
N: Always cleared to 0.
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 0.
2nd byte
3
cleared to 0.
Instruction Format
— —
Rev. 3.00 Dec 13, 2004 page 175 of 258
I
0 erd
UI
LSB
Section 2 Instruction Descriptions
b
0
— —
H
3rd byte
U
C
N
0
4th byte
REJ09B0213-0300
Z
Shift Logical
V
0
States
No. of
C
2