EP9307-CRZ Cirrus Logic Inc, EP9307-CRZ Datasheet - Page 285

• Manufacturer Part Number: EP9307-CRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-CRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1138

DS785UM1
8.6.4.1 Example of Block Copy
To achieve the following display and pattern, follow Steps A to I in this section.
• Screen Size is 640x480x16-bits/pixel
• Screen memory starts at physical address 0x0000_0000
• Image to be copied is at physical address 0x0000_0960
• Image to be copied is at position (51, 75)
• Image destination is at position (300, 115)
• Source and destination width is 30 pixels
same.
placed into the destination image left to right and top to bottom.
Write 0x0000_0000 to the BLOCKCTRL register to clear it.
Write PACKD = ‘0’ to specify that the size of the source and destination images are the
Write P = 0x4 to specify 16-bits/pixel.
Write SXDIR = ‘0’, SYDIR = ‘0’, DXDIR = ‘0’, DYDIR = ‘0’ to specify that pixels are
Write FILL = ‘1’ to enable the block copy or Block Copy function.
Write INTEN = ‘1’ to enable the Graphics Accelerator interrupt.
Write EN = ‘1’ to initiate graphics processing
A. SRCPIXELSTRT = (51 * 16)% 32 = 16
B. BLKSRCSTRT = 0x960
C. SRCLINELENGTH = 640 / 2 pixels per word = 320 = 0x140
D. DESTPIXELSTRT:
E. BLKDESTSTRT =[(640 * 115) + 300] * 2 = 147800 = 0x24158
F. BLKDESTWIDTH = (30 / 2) - 1 = 14 = 0xE
G. BLKDESTHEIGHT = 20
H. BLOCKCTRL:
I. The final step is to wait for an interrupt or poll for EN = ‘0’. When the EN bit becomes
EPEL = {[640 * (115 + 20)] + 300 +20} * 16% 32 = 0 = 0x0
SPEL = [(640 * 115) + 300] * 16% 32 = 0 = 0x0
cleared to ‘0’, the Block Copy function is complete.
Copyright 2007 Cirrus Logic
Graphics Accelerator
EP93xx User’s Guide
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