LPC1342FHN33,551 NXP Semiconductors, LPC1342FHN33,551 Datasheet - Page 17

• Manufacturer Part Number: LPC1342FHN33,551
• Description: IC MCU 32BIT 16KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1342FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4946; 935289656551

NXP Semiconductors
UM10375
User manual
3.5.6 USB PLL status register
Table 10.
This register is a Read-only register and supplies the PLL lock status (see
Section
Table 11.
Bit
6:5
31:7
Bit
0
31:1
Symbol
PSEL
-
Symbol
LOCK
-
3.10.1).
USB PLL control register (USBPLLCTRL, address 0x4004 8010) bit description
USB PLL status register (USBPLLSTAT, address 0x4004 8014) bit description
All information provided in this document is subject to legal disclaimers.
Value
00
01
10
11
Value
0
1
-
-
Rev. 2 — 7 July 2010
Description
Post divider ratio P. The division ratio is 2 × P.
P = 1
P = 2
P = 4
P = 8
Reserved. Do not write ones to reserved bits.
Description
PLL lock status
PLL not locked
PLL locked
Reserved
Chapter 3: LPC13xx System configuration
UM10375
© NXP B.V. 2010. All rights reserved.
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Reset
value
0x00
0x00
Reset
value
0x0
0x00