P89V52X2FA,512 NXP Semiconductors, P89V52X2FA,512 Datasheet - Page 5

• Manufacturer Part Number: P89V52X2FA,512
• Description: IC 80C51 MCU FLASH 8K 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V52X2FA,512

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 44-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: POR
• Number Of I /o: 32
• Eeprom Size: 192 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM11011 - BOARD FOR P89V52X2 44-TQFP622-1017 - BOARD 44-ZIF PLCC SOCKET622-1012 - BOARD FOR P89V52X2 44-TQFP622-1008 - BOARD FOR LPC9103 10-HVSON622-1002 - USB IN-CIRCUIT PROG LPC9XX
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4249-5; 935282528512; P89V52X2FA

NXP Semiconductors
Table 2.
P89V52X2_3
Product data sheet
Symbol
P0[0] to P0[7]
P0[0]/AD0
P0[1]/AD1
P0[2]/AD2
P0[3]/AD3
P0[4]/AD4
P0[5]/AD5
P0[6]/AD6
P0[7]/AD7
P1[0] to P1[7]
P1[0]/T2
P1[1]/T2EX
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
Pin description
Pin
DIP40
39
38
37
36
35
34
33
32
1
2
3
4
5
6
7
5.2 Pin description
LQFP44
37
36
35
34
33
32
31
30
40
41
42
43
44
1
2
PLCC44
43
42
41
40
39
38
37
36
2
3
4
5
6
7
8
Rev. 03 — 4 May 2009
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O with
internal
pull-up
I/O
I
I/O
I
I/O
I/O
I/O
I/O
I/O
Description
Port 0: Port 0 is an 8-bit open-drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them float, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. External pull-ups are required as a
general purpose I/O port.
P0[0] — Port 0 bit 0.
AD0 — Address/data bit 0.
P0[1] — Port 0 bit 1.
AD1 — Address/data bit 1.
P0[2] — Port 0 bit 2.
AD2 — Address/data bit 2.
P0[3] — Port 0 bit 3.
AD3 — Address/data bit 3.
P0[4] — Port 0 bit 4.
AD4 — Address/data bit 4.
P0[5] — Port 0 bit 5.
AD5 — Address/data bit 5.
P0[6] — Port 0 bit 6.
AD6 — Address/data bit 6.
P0[7] — Port 0 bit 7.
AD7 — Address/data bit 7.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled HIGH by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (I
the internal pull-ups. P1[5], P1[6], P1[7] have high current
drive of 16 mA.
P1[0] — Port 1 bit 0.
T2 — External count input to Timer/Counter 2 or Clock-out
from Timer/Counter 2
P1[1] — Port 1 bit 1.
T2EX: Timer/Counter 2 capture/reload trigger and
direction control
P1[2] — Port 1 bit 2.
P1[3] — Port 1 bit 3.
P1[4] — Port 1 bit 4.
P1[5] — Port 1 bit 5.
P1[6] — Port 1 bit 6.
80C51 with 256 B RAM, 192 B data EEPROM
P89V52X2
© NXP B.V. 2009. All rights reserved.
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