P89V52X2FA,512 NXP Semiconductors, P89V52X2FA,512 Datasheet - Page 42

IC 80C51 MCU FLASH 8K 44-PLCC

P89V52X2FA,512

Manufacturer Part Number
P89V52X2FA,512
Description
IC 80C51 MCU FLASH 8K 44-PLCC
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V52X2FA,512

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
44-PLCC
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR
Number Of I /o
32
Eeprom Size
192 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM11011 - BOARD FOR P89V52X2 44-TQFP622-1017 - BOARD 44-ZIF PLCC SOCKET622-1012 - BOARD FOR P89V52X2 44-TQFP622-1008 - BOARD FOR LPC9103 10-HVSON622-1002 - USB IN-CIRCUIT PROG LPC9XX
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4249-5
935282528512
P89V52X2FA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89V52X2FA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
7. Limiting values
Table 43.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
otherwise noted.
8. Static characteristics
Table 44.
T
P89V52X2_3
Product data sheet
Symbol
T
T
V
I
P
Symbol
n
t
I
V
V
V
V
I
I
I
OL(I/O)
ret(fl)
latch
IL
THL
LI
amb
endu(fl)
amb(bias)
stg
n
tot(pack)
IL
IH
OL
OH
= 40 C to +85 C; V
Limiting values
Static characteristics
Parameter
endurance of flash
memory
flash memory
retention time
I/O latch-up current JEDEC Standard 78
LOW-level input
voltage
HIGH-level input
voltage
LOW-level output
voltage
HIGH-level output
voltage
LOW-level input
current
HIGH-LOW
transition current
input leakage
current
Parameter
bias ambient temperature
storage temperature
voltage on any other pin
LOW-level output current per
input/output pin
total power dissipation (per package) based on package heat
DD
= 2.7 V to 5.5 V; V
Conditions
JEDEC Standard A117
JEDEC Standard A103
V
V
V
V
Bus mode, ALE, PSEN
V
V
0.45 V < V
0
DD
DD
DD
DD
I
I
I
I
I
I
= 0.4 V, ports 1, 2, 3
= 2 V, ports 1, 2, 3
OL
OH
OH
OH
= 4.5 V
= 2.7 V, ports 1, 2, 3
= 4.5 V, ports 1, 2, 3
= 4.5 V, Port 0 in External
= 3.2 mA
= 20 A
= 30 A
= 3.2 mA
I
< V
SS
DD
= 0 V
Rev. 03 — 4 May 2009
Conditions
except V
V
transfer, not device power
consumption
0.3 V, port
DD
SS
, with respect to
[2][3][4]
[1]
[1]
[1]
[5]
[5]
[6]
80C51 with 256 B RAM, 192 B data EEPROM
Min
10000
100
100 + I
0.7V
-
V
V
V
-
-
0.5
1
DD
DD
DD
DD
0.7
0.7
0.7
DD
Min
-
-
55
65
0.5
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
0.3V
6.0
0.4
-
-
-
50
650
10
P89V52X2
Max
+125
+150
V
15
1.5
DD
© NXP B.V. 2009. All rights reserved.
DD
+ 0.5
SS
Unit
cycles
years
mA
V
V
V
V
V
V
Unit
V
mA
W
42 of 57
unless
A
A
A
C
C

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