P89V52X2FA,512 NXP Semiconductors, P89V52X2FA,512 Datasheet - Page 29
![IC 80C51 MCU FLASH 8K 44-PLCC](/photos/6/98/69845/568-44-plcc_sot187-2_sml.jpg)
P89V52X2FA,512
Manufacturer Part Number
P89V52X2FA,512
Description
IC 80C51 MCU FLASH 8K 44-PLCC
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet
1.P89V52X2FA512.pdf
(57 pages)
Specifications of P89V52X2FA,512
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
44-PLCC
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR
Number Of I /o
32
Eeprom Size
192 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM11011 - BOARD FOR P89V52X2 44-TQFP622-1017 - BOARD 44-ZIF PLCC SOCKET622-1012 - BOARD FOR P89V52X2 44-TQFP622-1008 - BOARD FOR LPC9103 10-HVSON622-1002 - USB IN-CIRCUIT PROG LPC9XX
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4249-5
935282528512
P89V52X2FA
935282528512
P89V52X2FA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89V52X2FA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
P89V52X2_3
Product data sheet
The following examples will help to show the versatility of this scheme.
Example 1, slave 0:
Example 2, slave 1:
In the above example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a ‘0’ in bit 0 and it ignores bit 1. Slave 1 requires
a ‘0’ in bit 1 and bit 0 is ignored. A unique address for Slave 0 would be 1100 0010 since
slave 1 requires a ‘0’ in bit 1. A unique address for slave 1 would be 1100 0001 since a ‘1’
in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed
with 1100 0000.
In a more complex system the following could be used to select slaves 1 and 2 while
excluding slave 0:
Example 1, slave 0:
SADDR = 1100 0000
--------------------------------------------------- -
SADDR = 1100 0000
--------------------------------------------------- -
SADEN = 1111 1101
SADEN = 1111 1110
Fig 18. Schemes used by the UART to detect ‘given’ and ‘broadcast’ addresses when
Given = 1100 00X0
Given = 1100 000X
multiprocessor communications is enabled
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
saddr(7)
saddr(0)
saddr(7)
saddr(0)
logic used by UART to detect 'given address' in received data
logic used by UART to detect 'given address' in received data
Rev. 03 — 4 May 2009
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
.
.
.
.
.
.
80C51 with 256 B RAM, 192 B data EEPROM
given_address_match
broadcast_address_match
P89V52X2
002aaa527
© NXP B.V. 2009. All rights reserved.
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