AT89C51ID2-RLTUM Atmel, AT89C51ID2-RLTUM Datasheet - Page 88

IC 8051 MCU FLASH 64K 44VQFP

AT89C51ID2-RLTUM

Manufacturer Part Number
AT89C51ID2-RLTUM
Description
IC 8051 MCU FLASH 64K 44VQFP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51ID2-RLTUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
UART, SPI, TWI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Package
44VQFP
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Height
1.45 mm
Length
10.1 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
10.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51ID2-RLTUM
Manufacturer:
ATMEL
Quantity:
13 937
Part Number:
AT89C51ID2-RLTUM
Manufacturer:
Atmel
Quantity:
10 000
Figure 33. Format and State in the Master Receiver Mode
4289C–8051–11/05
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or acknowledge bit
Arbitration lost and
addressed as slave
From master to slave
From slave to master
08h
S
SLA
R
A or A
MR
Data
40h
A
A
48h
38h
A
68h
n
Other master
Other master
78h
continues
continues
P
Data
A
B0h
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
50h
A
Data
To corresponding
states in slave mode
58h
A
38h
A
Other master
10h
continues
S
P
AT89C51ID2
SLA
W
R
MT
88

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