ATMEGA1284P-AU Atmel, ATMEGA1284P-AU Datasheet - Page 183

MCU AVR 128K ISP FLASH 44-TQFP

ATMEGA1284P-AU

Manufacturer Part Number
ATMEGA1284P-AU
Description
MCU AVR 128K ISP FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA1284P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRAVEN, ATAVRRZUSBSTICK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Rom Size
4 KB
Height
1.05 mm
Length
10.1 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
10.1 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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8272A–AVR–01/10
Note:
The receive function example reads all the I/O Registers into the Register File before any com-
putation is done. This gives an optimal receive buffer utilization since the buffer location read will
be free to accept new data as early as possible.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Assembly Code Example
C Code Example
USART_Receive:
USART_ReceiveNoError:
unsigned int USART_Receive( void )
{
}
; Wait for data to be received
sbis UCSRnA, RXCn
rjmp USART_Receive
; Get status and 9th bit, then data from buffer
in
in
in
; If error, return -1
andi r18,(1<<FEn)|(1<<DORn)|(1<<UPEn)
breq USART_ReceiveNoError
ldi
ldi
; Filter the 9th bit, then return
lsr
andi r17, 0x01
ret
unsigned char status, resh, resl;
/* Wait for data to be received */
while ( !(UCSRnA & (1<<RXCn)) )
/* Get status and 9th bit, then data */
/* from buffer */
status = UCSRnA;
resh = UCSRnB;
resl = UDRn;
/* If error, return -1 */
if ( status & (1<<FEn)|(1<<DORn)|(1<<UPEn) )
/* Filter the 9th bit, then return */
resh = (resh >> 1) & 0x01;
return ((resh << 8) | resl);
1. See “About Code Examples” on page 9.
return -1;
r18, UCSRnA
r17, UCSRnB
r16, UDRn
r17, HIGH(-1)
r16, LOW(-1)
r17
;
(1)
(1)
183

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