ATMEGA1284P-AU Atmel, ATMEGA1284P-AU Datasheet - Page 312

MCU AVR 128K ISP FLASH 44-TQFP

ATMEGA1284P-AU

Manufacturer Part Number
ATMEGA1284P-AU
Description
MCU AVR 128K ISP FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA1284P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRAVEN, ATAVRRZUSBSTICK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Rom Size
4 KB
Height
1.05 mm
Length
10.1 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
10.1 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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26.9
Table 26-17. Serial Programming Instruction Set (Hexadecimal values)
8272A–AVR–01/10
Instruction/Operation
Programming Enable
Chip Erase (Program Memory/EEPROM)
Poll RDY/BSY
Load Instructions
Load Extended Address byte
Load Program Memory Page, High byte
Load Program Memory Page, Low byte
Load EEPROM Memory Page (page access)
Read Instructions
Read Program Memory, High byte
Read Program Memory, Low byte
Read EEPROM Memory
Read Lock bits
Read Signature Byte
Read Fuse bits
Read Fuse High bits
Read Extended Fuse Bits
Read Calibration Byte
Write Instructions
Write Program Memory Page
Write EEPROM Memory
Write EEPROM Memory Page (page access)
Write Lock bits
Write Fuse bits
Write Fuse High bits
Write Extended Fuse Bits
Serial Programming Instruction set
(6)
Table 26-16. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Table 26-17 on page 312
164A/164PA/324A/324PA/644A/644PA/1284/1284P
(1)
Symbol
t
t
t
WD_FLASH
WD_EEPROM
WD_ERASE
Byte 1
$AC
$AC
$AC
$AC
$AC
$AC
$4D
$C1
$A0
$4C
$C0
$C2
$F0
$48
$40
$28
$20
$58
$30
$50
$58
$50
$38
and
Figure 26-11 on page 313
0000 00aa
0000 00aa
0000 00aa
adr MSB
adr MSB
adr MSB
Byte 2
$E0
$A0
$A8
$A4
$53
$80
$00
$00
$00
$00
$00
$00
$00
$00
$08
$08
$00
Instruction Format
Minimum Wait Delay
describes the Instruction set.
Extended adr
0000 000aa
0000 000aa
aaaa aa00
aaaa aaaa
aaaa aaaa
4.5 ms
9.0 ms
9.0 ms
adr LSB
adr LSB
adr LSB
adr LSB
adr LSB
Byte 3
$00
$00
$00
$00
$00
$00
$00
$00
$00
$00
$00
$00
high data byte out
low data byte out
high data byte in
low data byte in
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte in
data byte in
data byte in
data byte in
data byte in
data byte in
Byte4
$00
$00
$00
$00
$00
312

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