AT32UC3B164-Z1UT Atmel, AT32UC3B164-Z1UT Datasheet - Page 375
![IC MCU AVR32 64KB FLASH 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
AT32UC3B164-Z1UT
Manufacturer Part Number
AT32UC3B164-Z1UT
Description
IC MCU AVR32 64KB FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B164-Z1UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
48QFN EP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-Z1UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 375 of 692
- Download datasheet (11Mb)
22.7.1.7
32059K–03/2011
Pad Suspend
Figure 22-9 on page 375
Figure 22-9. Pad Behavior
Figure 22-10 on page 376
• There is no way the data of the pipe/endpoint 0 can be lost (except if it is de-allocated) as
• Deactivating then reactivating a same pipe/endpoint with the same configuration only
• When the user write a one to the ALLOC bit, the Configuration OK Status bit in the Endpoint
• In the Idle state, the pad is put in low power consumption mode, i.e., the differential receiver
• In the Active state, the pad is working.
memory allocation and de-allocation may affect only higher pipes/endpoints.
modifies temporarily the controller DPRAM pointer and size for this pipe/endpoint, but
nothing changes in the DPRAM, so higher endpoints seem to not have been moved and their
data is preserved as far as nothing has been written or received into them while changing the
allocation state of the first pipe/endpoint.
n Status register (UESTAn.CFGOK) is set only if the configured size and number of banks
are correct compared to their maximal allowed values for the endpoint and to the maximal
FIFO size (i.e. the DPRAM size), so the value of CFGOK does not consider memory
allocation conflicts.
of the USB pad is off, and internal pull-down with strong value(15K) are set in both DP/DM to
avoid floating lines.
shows the pad behavior.
illustrates the pad events leading to a PAD state change.
Idle
| DETACH = 1
| Suspend
USBE = 0
& DETACH = 0
& Suspend
USBE = 1
Active
AT32UC3B
375
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