AT32UC3B164-Z1UT Atmel, AT32UC3B164-Z1UT Datasheet - Page 374
![IC MCU AVR32 64KB FLASH 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
AT32UC3B164-Z1UT
Manufacturer Part Number
AT32UC3B164-Z1UT
Description
IC MCU AVR32 64KB FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B164-Z1UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
48QFN EP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-Z1UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 374 of 692
- Download datasheet (11Mb)
32059K–03/2011
U(P/E)RST.(E)PENn = 1
U(P/E)CFGn.ALLOC = 1
Pipes/Endpoints 0..5
Free Memory
Activated
memory area in the DPRAM and inserts it between the n-1 and n+1 pipes/endpoints. The n+1
pipe/endpoint memory window slides up and its data is lost. Note that the following pipe/end-
point memory windows (from n+2) do not slide.
Disabling a pipe, by writing a zero to the Pipe n Enable bit in the Pipe Enable/Reset register
(UPRST.PENn), or disabling an endpoint, by writing a zero to the Endpoint n Enable bit in the
Endpoint Enable/Reset register (UERST.EPENn), resets neither the UECFGn.ALLOC bit nor its
configuration (the Pipe Banks (PBK) field, the Pipe Size (PSIZE) field, the Pipe Token (PTO-
KEN) field, the Pipe Type (PTYPE) field, the Pipe Endpoint Number (PEPNUM) field, and the
Pipe Interrupt Request Frequency (INTFRQ) field in the Pipe n Configuration (UPCFGn) regis-
ter/the Endpoint Banks (EPBK) field, the Endpoint Size (EPSIZE) field, the Endpoint Direction
(EPDIR) field, and the Endpoint Type (EPTYPE) field in UECFGn).
To free its memory, the user shall write a zero to the UECFGn.ALLOC bit. The n+1 pipe/end-
point memory window then slides down and its data is lost. Note that the following pipe/endpoint
memory windows (from n+2) does not slide.
Figure 22-8 on page 374
example.
Figure 22-8. Allocation and Reorganization of the DPRAM
Note that:
PEP5
PEP4
PEP3
PEP2
PEP1
PEP0
1. The pipes/endpoints 0 to 5 are enabled, configured and allocated in ascending order.
2. The pipe/endpoint 3 is disabled, but its memory is kept allocated by the controller.
3. In order to free its memory, its ALLOC bit is written to zero. The pipe/endpoint 4 mem-
4. If the user chooses to reconfigure the pipe/endpoint 3 with a larger size, the controller
Each pipe/endpoint then owns a memory area in the DPRAM.
ory window slides down, but the pipe/endpoint 5 does not move.
allocates a memory area after the pipe/endpoint 2 memory area and automatically
slides up the pipe/endpoint 4 memory window. The pipe/endpoint 5 does not move and
a memory conflict appears as the memory windows of the pipes/endpoints 4 and 5
overlap. The data of these pipes/endpoints is potentially lost.
U(P/E)RST.(E)PEN3 = 0
Pipe/Endpoint 3
(ALLOC stays at 1)
Free Memory
Disabled
PEP5
PEP4
PEP3
PEP2
PEP1
PEP0
illustrates the allocation and reorganization of the DPRAM in a typical
U(P/E)CFG3.ALLOC = 0
Pipe/Endpoint 3
PEP4 Lost Memory
Memory Freed
Free Memory
PEP5
PEP4
PEP2
PEP1
PEP0
U(P/E)RST.(E)PEN3 = 1
U(P/E)CFG3.ALLOC = 1
Pipe/Endpoint 3
PEP3 (larger size)
Free Memory
Activated
PEP4
PEP2
PEP1
PEP0
PEP5
AT32UC3B
Conflict
374
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