AT32UC3B164-Z1UT Atmel, AT32UC3B164-Z1UT Datasheet - Page 124
![IC MCU AVR32 64KB FLASH 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
AT32UC3B164-Z1UT
Manufacturer Part Number
AT32UC3B164-Z1UT
Description
IC MCU AVR32 64KB FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B164-Z1UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
48QFN EP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-Z1UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 124 of 692
- Download datasheet (11Mb)
14.5.1
14.5.2
32059K–03/2011
Write/erase page operation
Erase All operation
All the commands are protected by the same keyword, which has to be written in the eight high-
est bits of FCMD. Writing FCMD with data that does not contain the correct key and/or with an
invalid command has no effect on the flash memory; however, the PROGE bit is set in FSR. This
bit is automatically cleared by a read access to FSR.
Writing a command to FCMD while another command is being executed has no effect on the
flash memory; however, the PROGE bit is set in FSR. This bit is automatically cleared by a read
access to FSR.
If the current command writes or erases a page in a locked region, or a page protected by the
BOOTPROT fuses, the command has no effect on the flash memory; however, the LOCKE bit is
set in FSR . This bit is automatically cleared by a read access to FSR.
Flash technology requires that an erase must be done before programming. The entire flash can
be erased by an Erase All command. Alternatively, pages can be individually erased by the
Erase Page command.
The User page can be written and erased using the mechanisms described in this chapter.
After programming, the page can be locked to prevent miscellaneous write or erase sequences.
Locking is performed on a per-region basis, so locking a region locks all pages inside the region.
Additional protection is provided for the lowermost address space of the flash. This address
space is allocated for the Boot Loader, and is protected both by the lock bit(s) corresponding to
this address space, and the BOOTPROT[2:0] fuses.
Data to be written are stored in an internal buffer called page buffer. The page buffer contains w
words. The page buffer wraps around within the internal memory area address space and
appears to be repeated by the number of pages in it. Writing of 8-bit and 16-bit data to the page
buffer is not allowed and may lead to unpredictable data corruption.
Data must be written to the page buffer before the programming command is written to FCMD.
The sequence is as follows:
Two errors can be detected in FSR after a programming sequence:
The entire memory is erased if the Erase All command (EA) is written to FCMD. Erase All erases
all bits in the flash array. The User page is not erased. All flash memory locations, the general-
purpose fuse bits, and the security bit are erased (reset to 0xFF) after an Erase All.
• Reset the page buffer with the Clear Page Buffer command.
• Fill the page buffer with the desired contents, using only 32-bit access.
• Programming starts as soon as the programming key and the programming command are
• When programming is completed, the bit FRDY in FSR is set. If an interrupt was enabled by
• Programming Error: A bad keyword and/or an invalid command have been written in FCMD.
• Lock Error: The page to be programmed belongs to a locked region. A command must be
written to the Flash Command Register. The FCMD.PAGEN field must contain the address of
the page to write. PAGEN is automatically updated when writing to the page buffer, but can
also be written to directly. The FRDY bit in FSR is automatically cleared when the page write
operation starts.
setting the bit FRDY in FCR, the interrupt line of the flash controller is set.
executed to unlock the corresponding region before programming can start.
AT32UC3B
124
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