AT32UC3B164-Z1UT Atmel, AT32UC3B164-Z1UT Datasheet - Page 191
![IC MCU AVR32 64KB FLASH 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
AT32UC3B164-Z1UT
Manufacturer Part Number
AT32UC3B164-Z1UT
Description
IC MCU AVR32 64KB FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B164-Z1UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
48QFN EP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-Z1UT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 191 of 692
- Download datasheet (11Mb)
17.7
17.7.1
17.7.2
32059K–03/2011
Programming Examples
8-bit LED-Chaser
Configuration of USART pins
It is assumed in this example that a subroutine "delay" exists that returns after a given time.
The example below shows how to configure a peripheral module to control I/O pins. It assumed
in this example that the USART receive pin (RXD) is connected to PC16 and that the USART
transmit pin (TXD) is connected to PC17. For both pins, the USART is peripheral B. In this
example, the state of the GPIO registers is assumed to be unknown. The two USART pins are
therefore first set to be controlled by the GPIO with output drivers disabled. The pins can then be
assured to be tri-stated while changing the Peripheral Mux Registers.
loop:
// Set R0 to GPIO base address
mov
orh
// Enable GPIO control of pin 0-8
mov
st.w
// Set initial value of port
mov
st.w
// Set up toggle value. Two pins are toggled
// in each round. The bit that is currently set,
// and the next bit to be set.
mov
orh
// Only change 8 LSB
mov
and
st.w
rol
rcall
rjmp
// Set up pointer to GPIO, PORTC
mov
orh
// Disable output drivers
R0, LO(AVR32_GPIO_ADDRESS)
R0, HI(AVR32_GPIO_ADDRESS)
R1, 0xFF
R0[AVR32_GPIO_GPERS], R1
R2, 0x01
R0[AVR32_GPIO_OVRS], R2
R2, 0x0303
R2, 0x0303
R3, 0x00FF
R3, R2
R0[AVR32_GPIO_OVRT], R3
R2
delay
loop
R0, LO(AVR32_GPIO_ADDRESS + PORTC_OFFSET)
R0, HI(AVR32_GPIO_ADDRESS + PORTC_OFFSET)
AT32UC3B
191
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