PIC16C765-I/P Microchip Technology, PIC16C765-I/P Datasheet - Page 43

• Manufacturer Part Number: PIC16C765-I/P
• Description: IC MCU OTP 8KX14 USB 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C765-I/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 24MHz
• Connectivity: SCI, UART/USART, USB
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.35 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 256Byte
• Cpu Speed: 24MHz
• No. Of Timers: 3
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Operating Supply Voltage: 4.35 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: Q975613

6.0
The Timer0 module timer/counter has the following fea-
tures:
• 8-bit timer/counter
• Readable and writable
• 8-bit software programmable prescaler
• Internal or external clock select
• Interrupt-on-overflow from FFh to 00h
• Edge select for external clock
Figure 6-1 is a block diagram of the Timer0 module and
the prescaler shared with the WDT.
Additional information on the Timer0 module is avail-
able in the PICmicro™ Mid-Range MCU Family Refer-
ence Manual (DS33023).
Timer mode is selected by clearing bit T0CS
(OPTION_REG<5>). In timer mode, the Timer0 mod-
ule will increment every instruction cycle (without pres-
caler). If the TMR0 register is written, the increment is
inhibited for the following two instruction cycles. The
user can work around this by writing an adjusted value
to the TMR0 register.
FIGURE 6-1:
RA4/T0CKI
2000 Microchip Technology Inc.
WDT Enable bit
Pin
Watchdog
Note: T0CS, T0SE, PSA, PS<2:0> are (OPTION_REG<5:0>).
Timer
TIMER0 MODULE
F
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
INT
T0SE
0
1
PSA
M
U
X
0
1
TOCS
M
U
X
0
8-bit Prescaler
8 - to - 1MUX
Time-out
8
M U X
WDT
Preliminary
PRESCALER
1
0
1
PSA
M
U
X
Counter mode is selected by setting bit T0CS
(OPTION_REG<5>). In counter mode, Timer0 will
increment either on every rising or falling edge of pin
RA4/T0CKI. The incrementing edge is determined by
the
(OPTION_REG<4>). Clearing bit T0SE selects the ris-
ing edge. Restrictions on the external clock input are
discussed in detail in Section 6.2.
The prescaler is mutually exclusively shared between
the Timer0 module and the watchdog timer. The pres-
caler is not readable or writable. Section 6.3 details the
operation of the prescaler.
6.1
The TMR0 interrupt is generated when the TMR0 reg-
ister overflows from FFh to 00h. This overflow sets bit
T0IF (INTCON<2>). The interrupt can be masked by
clearing bit T0IE (INTCON<5>). Bit T0IF must be
cleared in software by the Timer0 module interrupt ser-
vice routine before re-enabling this interrupt. The
TMR0 interrupt cannot awaken the processor from
SLEEP, since the timer is shut off during SLEEP.
PSA
Timer0
PS<2:0>
Timer0 Interrupt
Cycles
SYNC
2
PIC16C745/765
Source
Edge
TMR0 reg
Data Bus
8
Select
DS41124C-page 43
Set flag bit T0IF
on Overflow
bit
T0SE