PIC16C765-I/P Microchip Technology, PIC16C765-I/P Datasheet - Page 15

• Manufacturer Part Number: PIC16C765-I/P
• Description: IC MCU OTP 8KX14 USB 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C765-I/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 24MHz
• Connectivity: SCI, UART/USART, USB
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.35 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 256Byte
• Cpu Speed: 24MHz
• No. Of Timers: 3
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Operating Supply Voltage: 4.35 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: Q975613

4.0
4.1
The PIC16C745/765 has a 13-bit program counter
capable of addressing an 8K x 14 program memory
space. All devices covered by this data sheet have 8K
x 14 bits of program memory. The address range is
0000h - 1FFFh for all devices.
The reset vector is at 0000h and the interrupt vector is
at 0004h.
FIGURE 4-1:
Program
On-chip
Memory
2000 Microchip Technology Inc.
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
PIC16C745/765 PROGRAM
MEMORY MAP AND STACK
Interrupt Vector
Stack Level 8
Stack Level 2
Stack Level 1
Reset Vector
PC<12:0>
Page 0
Page 1
Page 2
Page 3
13
0004h
0005h
07FFh
0800h
0FFFh
1000h
17FFh
1800h
0000h
1FFFh
Preliminary
4.2
The data memory is partitioned into multiple banks
which contain the General Purpose Registers (GPR)
and the Special Function Registers (SFR). Bits RP1
and RP0 are the bank select bits.
RP<1:0> (STATUS<6:5>)
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the SFRs.
Above the SFRs are GPRs, implemented as static
RAM.
All implemented banks contain SFRs. Some “high use”
SFRs from one bank may be mirrored in another bank
for code reduction and quicker access.
4.2.1
The register file can be accessed either directly or indi-
rectly through the File Select Register (FSR)
(Section 4.5).
= 00
= 01
= 10
= 11
Bank0
Bank1
Bank2
Bank3
Data Memory Organization
GENERAL PURPOSE REGISTER FILE
PIC16C745/765
DS41124C-page 15