PIC16C765-I/P Microchip Technology, PIC16C765-I/P Datasheet - Page 19

• Manufacturer Part Number: PIC16C765-I/P
• Description: IC MCU OTP 8KX14 USB 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C765-I/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 24MHz
• Connectivity: SCI, UART/USART, USB
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.35 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 256Byte
• Cpu Speed: 24MHz
• No. Of Timers: 3
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Operating Supply Voltage: 4.35 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: Q975613

TABLE 4-1:
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch-
11Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ’0’.
Note 1:
Address
Bank 2
2000 Microchip Technology Inc.
2: Other (non power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset.
3: These registers can be addressed from any bank.
4: The Parallel Slave Port (PORTD and PORTE) is not implemented on the PIC16C745, always maintain these bits clear.
INDF
TMR0
PCL
STATUS
FSR
PORTB
PCLATH
INTCON
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents
are transferred to the upper byte of the program counter.
Name
(3)
(3)
(3)
—
—
—
—
—
(3)
(1,3)
(3)
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Bit 7
IRP
GIE
—
Bit 6
PEIE
RP1
—
Bit 5
T0IE
RP0
—
Write Buffer for the upper 5 bits of the Program Counter
Preliminary
INTE
Bit 4
TO
RBIE
Bit 3
PD
Bit 2
T0IF
Z
PIC16C745/765
INTF
Bit 1
DC
Bit 0
RBIF
C
DS41124C-page 19
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---0 0000 ---0 0000
0000 000x 0000 000u
Value on:
POR,
BOR
—
—
—
—
—
other resets
Value on all
(2)
—
—
—
—
—