C8051F960-A-GQ Silicon Labs, C8051F960-A-GQ Datasheet - Page 369

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C8051F960-A-GQ

Manufacturer Part Number
C8051F960-A-GQ
Description
8-bit Microcontrollers - MCU 128KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F960-A-GQ

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F960-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F960-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
SFR Definition 27.18. P2: Port2
SFR Page = All Pages; SFR Address = 0xA0; Bit-Addressable
SFR Definition 27.19. P2SKIP: Port2 Skip
SFR Page = 0x0; SFR Address = 0xD6
Name
Reset
Name
Reset
Type
Type
7:0
Bit
7:0
Bit
Bit
Bit
P2SKIP[7:0]
P2[7:0]
Name
Name
7
1
7
0
Port 2 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Port 1 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
6
1
6
0
Description
Description
5
1
5
0
Rev. 0.5
4
1
4
0
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P2SKIP[7:0]
P2[7:0]
R/W
R/W
Read
Read
3
1
3
0
2
1
2
0
0: P2.n Port pin is logic
LOW.
1: P2.n Port pin is logic
HIGH.
C8051F96x
1
1
1
0
Write
Write
0
1
0
0
369

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