STM8S105C4B3 STMICROELECTRONICS [STMicroelectronics], STM8S105C4B3 Datasheet - Page 95

• Manufacturer Part Number: STM8S105C4B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM8S105xx
Symbol
t
t
(1)
production.
(2)
time to validate the data.
(3)
maximum time to put the data in Hi-Z.
h(SO)
h(MO)
Min time is for the minimum time to drive the output and the max time is for the maximum
Values based on design simulation and/or characterization results, and not tested in
Min time is for the minimum time to invalidate the output and the max time is for the
(1)
(1)
OUT P UT
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
I NPUT
MISO
MOSI
t SU(NSS)
t a(SO)
Figure 41: SPI timing diagram - slave mode and CPHA = 0
Parameter
Data output
hold time
t su(SI)
t w(SCKH)
t w(SCKL)
MS B O UT
t v(SO)
M SB IN
DocID14771 Rev 9
t h(SI)
t c(SCK)
Conditions
Slave mode
(after enable edge)
Master mode
(after enable edge)
BI T6 OUT
B I T1 IN
t h(SO)
LSB IN
Min
t r(SCK)
t f(SCK)
LSB OUT
28
12
t h(NSS)
Electrical characteristics
t dis(SO)
Max
ai14134
Unit
95/127
ns
ns