ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 84

• Manufacturer Part Number: ATA6602-PLQW
• Description: Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Manufacturer: ATMEL [ATMEL Corporation]

4.9.2.1
4.9.2.2
84
ATA6602/ATA6603
Moving Interrupts Between Application and Boot Space, ATA6602 and ATA6603
MCU Control Register – MCUCR
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in ATA6603 is:
The MCU Control Register controls the placement of the Interrupt Vector table.
Note:
• Bit 1 – IVSEL: Interrupt Vector Select
Initial Value
Read/Write
Address Labels Code
;
.org 0x1C00
0x1C00
0x1C02
0x1C04
...
0x1C32
;
0x1C33
0x1C34
0x1C35
0x1C36
0x1C37
0x1C38
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the
Flash memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning
of the Boot Loader section of the Flash. The actual address of the start of the Boot Flash
Section is determined by the BOOTSZ Fuses. Refer to section
Read-While-Write Self-Programming, ATA6602 and ATA6603” on page 281
avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol-
lowed to change the IVSEL bit:
Interrupts will automatically be disabled while this sequence is executed. Interrupts are dis-
abled in the cycle IVCE is set, and they remain disabled until after the instruction following
the write to IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit
in the Status Register is unaffected by the automatic disabling.
Bit
a. Write the Interrupt Vector Change Enable (IVCE) bit to one.
b. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to section
Read-While-Write Self-Programming, ATA6602 and ATA6603” on page 281
Lock bits.
RESET: ldi
R
7
–
0
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
R
6
–
0
RESET
EXT_INT0
EXT_INT1
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
R
5
–
0
PUD
R/W
4
0
Comments
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
R
3
–
0
“Boot Loader Support –
R
2
–
0
IVSEL
R/W
“Boot Loader Support –
1
0
for details on Boot
IVCE
R/W
4921C–AUTO–01/07
0
0
for details. To
MCUCR