ATA6602-PLQW ATMEL [ATMEL Corporation], ATA6602-PLQW Datasheet - Page 359

• Manufacturer Part Number: ATA6602-PLQW
• Description: Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Manufacturer: ATMEL [ATMEL Corporation]

4921C–AUTO–01/07
4.16 Serial Peripheral Interface – SPI ......................................................................181
4.17 USART0 ...........................................................................................................190
4.18 USART in SPI Mode ........................................................................................217
4.19 2-wire Serial Interface ......................................................................................227
4.20 Analog Comparator ..........................................................................................259
4.21 Analog-to-Digital Converter ..............................................................................262
4.15.6 Modes of Operation ....................................................................................165
4.15.7 Timer/Counter Timing Diagrams .................................................................169
4.15.8 8-bit Timer/Counter Register Description ....................................................171
4.15.9 Asynchronous operation of the Timer/Counter ...........................................177
4.15.10 Timer/Counter Prescaler .............................................................................180
4.16.1 SS Pin Functionality ....................................................................................186
4.16.2 Data Modes .................................................................................................189
4.17.1 Overview .....................................................................................................190
4.17.2 Clock Generation ........................................................................................192
4.17.3 Frame Formats ...........................................................................................195
4.17.4 USART Initialization ....................................................................................196
4.17.5 Data Transmission – The USART Transmitter ...........................................198
4.17.6 Data Reception – The USART Receiver .....................................................200
4.17.7 Asynchronous Data Reception ...................................................................205
4.17.8 Multi-processor Communication Mode .......................................................208
4.17.9 USART Register Description ......................................................................209
4.17.10 Examples of Baud Rate Setting ..................................................................214
4.18.1 Overview .....................................................................................................217
4.18.2 Clock Generation ........................................................................................217
4.18.3 SPI Data Modes and Timing .......................................................................218
4.18.4 Frame Formats ...........................................................................................219
4.18.5 Data Transfer ..............................................................................................221
4.18.6 USART MSPIM Register Description ..........................................................223
4.18.7 AVR USART MSPIM versus AVR SPI ........................................................226
4.19.1 Features ......................................................................................................227
4.19.2 2-wire Serial Interface Bus Definition ..........................................................227
4.19.3 Data Transfer and Frame Format ...............................................................228
4.19.4 Multi-master Bus Systems, Arbitration and Synchronization ......................231
4.19.5 Overview of the TWI Module .......................................................................233
4.19.6 TWI Register Description ............................................................................235
4.19.7 Using the TWI .............................................................................................239
4.19.8 Transmission Modes ...................................................................................243
4.19.9 Multi-master Systems and Arbitration .........................................................257
4.20.1 ADC Control and Status Register B – ADCSRB .........................................259
4.20.2 Analog Comparator Control and Status Register – ACSR ..........................260
4.20.3 Analog Comparator Multiplexed Input .........................................................261
4.21.1 Features ......................................................................................................262
4.21.2 Starting a Conversion .................................................................................264
ATA6602/ATA6603
359