APA075-BGB ACTEL [Actel Corporation], APA075-BGB Datasheet - Page 65
APA075-BGB
Manufacturer Part Number
APA075-BGB
Description
ProASIC Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.APA075-BGB.pdf
(174 pages)
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Asynchronous SRAM Read, RDB Controlled
Note: The plot shows the normal operation status.
Figure 1-35 • Asynchronous SRAM Read, RDB Controlled
Table 1-54 • T
Symbol t
ORDA
ORDH
RDCYC
RDMH
RDML
RPRDA
RPRDH
Note: All –F speed grade devices are 20% slower than the standard numbers.
xxx
T
J
J
= –55°C to 150°C, V
= 0°C to 110°C; V
New DO access from RB ↓
RB high phase
Old RPE valid from RB ↓
Old DO valid from RB ↓
Read cycle time
RB low phase
New RPE access from RB ↓
RB=(RDB+RBLKB)
Description
DD
RPE
DD
DO
= 2.3 V to 2.7 V for Commercial/industrial
= 2.3 V to 2.7 V for Military/MIL-STD-883
t RPRDH
t ORDH
t ORDA
t RPRDA
Min.
v5.7
7.5
7.5
3.0
3.0
9.5
t RDML
t RDCYC
Max.
3.0
3.0
Units
ns
ns
ns
ns
ns
ns
ns
t RDMH
ProASIC
Inactive setup to new cycle
Active
PLUS
Flash Family FPGAs
Notes
1-59
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