APA075-BGB ACTEL [Actel Corporation], APA075-BGB Datasheet - Page 63
![no-image](/images/no-image-200.jpg)
APA075-BGB
Manufacturer Part Number
APA075-BGB
Description
ProASIC Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.APA075-BGB.pdf
(174 pages)
- Current page: 63 of 174
- Download datasheet (5Mb)
Asynchronous SRAM Write
Note: The plot shows the normal operation status.
Figure 1-33 • Asynchronous SRAM Write
Table 1-52 • T
Symbol t
AWRH
AWRS
DWRH
DWRS
DWRS
WPDA
WPDH
WRCYC
WRMH
WRML
Note: All –F speed grade devices are 20% slower than the standard numbers.
xxx
T
J
J
= 0°C to 110°C; V
= –55°C to 150°C, V
DI setup to WB ↑
DI setup to WB ↑
WADDR hold from WB ↑
WADDR setup to WB ↓
DI hold from WB ↑
WPE access from DI
WPE hold from DI
Cycle time
WB high phase
WB low phase
WRB, WBLKB
Description
DD
WADDR
DD
= 2.3 V to 2.7 V for Commercial/industrial
WPE
= 2.3 V to 2.7 V for Military/MIL-STD-883B
t AWRS
DI
t WPDA
Min.
v5.7
1.0
0.5
1.5
0.5
2.5
3.0
7.5
3.0
3.0
t WRML
t DWRS
t WRCYC
Max.
1.0
t WRMH
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ProASIC
PARGEN is inactive.
PARGEN is active.
WPE is invalid, while PARGEN is
active.
Inactive
Active
t AWRH
t DWRH
t WPDH
PLUS
Flash Family FPGAs
Notes
1-57
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