APA075-BGB ACTEL [Actel Corporation], APA075-BGB Datasheet - Page 58
APA075-BGB
Manufacturer Part Number
APA075-BGB
Description
ProASIC Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.APA075-BGB.pdf
(174 pages)
- Current page: 58 of 174
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Table 1-46 • Recommended Operating Conditions
Table 1-47 • Slew Rates Measured at C = 30pF, Nominal Power Supplies and 25°C
1 -5 2
Parameter
Maximum Clock Frequency*
Maximum RAM Frequency*
Maximum Rise/Fall Time on Inputs*
•
•
Maximum LVPECL Frequency*
Maximum TCK Frequency (JTAG)
Note: *All –F parts will be 20% slower than standard commercial devices.
Type
OB33PH
OB33PN
OB33PL
OB33LH
OB33LN
OB33LL
OB25LPHH
OB25LPHN
OB25LPHL
OB25LPLH
OB25LPLN
OB25LPLL
Notes:
1. Standard and –F parts.
2. All –F only available as commercial.
ProASIC
Schmitt Trigger Mode (10% to 90%)
Non-Schmitt Trigger Mode (10% to
90%)
PLUS
Trig. Level Rising Edge (ns)
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
10%-90%
Flash Family FPGAs
1.60
1.57
1.57
3.80
4.19
5.49
1.55
1.70
1.97
3.57
4.65
5.52
Symbol
f
CLOCK
f
t
t
f
RAM
R
R
TCK
Slew Rate (V/ns)
/t
/t
F
F
1.65
1.68
1.68
0.70
0.63
0.48
1.29
1.18
1.02
0.56
0.43
0.36
v5.7
Commercial/Industrial
Falling Edge (ns)
180 MHz
150 MHz
180 MHz
10 MHz
100 ns
N/A
1.65
3.32
1.99
4.84
3.37
2.98
1.56
2.08
2.09
3.93
3.28
3.44
Limits
Slew Rate (V/ns)
1.60
0.80
1.32
0.55
0.78
0.89
1.28
0.96
0.96
0.51
0.61
0.58
Military/MIL-STD-883
180 MHz
150 MHz
180 MHz
10 MHz
100 ns
10 ns
PCI Mode
Yes
No
No
No
No
No
No
No
No
No
No
No
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