am79c972b Advanced Micro Devices, am79c972b Datasheet - Page 82

• Manufacturer Part Number: am79c972b
• Description: Pcnet?-fast+ Enhanced 10/100 Mbps Pci Ethernet Controller With Onnow Support
• Manufacturer: Advanced Micro Devices

n BCR37
n BCR38
n BCR39
n BCR40
n BCR41
n BCR42
n BCR43
n BCR44
n BCR45
n BCR46
n BCR47
n CSR116
If PREAD (BCR19, bit 14) and PVALID (BCR19, bit 15)
are cleared to 0, then the EEPROM read has experi-
enced a failure and the contents of the EEPROM pro-
grammable BCR register will be set to default
H_RESET values. The content of the Address PROM
locations, however, will not be cleared.
Accesses to the Address PROM I/O locations do not di-
rectly access the Address EEPROM itself. Instead,
these accesses are routed to a set of shadow registers
on board the Am79C972 controller that are loaded with
a copy of the EEPROM contents during the automatic
read operation that immediately follows the H_RESET
operation.
82
PCI DATA Register Zero (DATA0)
PCI DATA Register One (DATA1)
PCI DATA Register Two (DATA2)
PCI
PCI DATA Register Four (DATA4)
PCI DATA Register Five (DATA5)
PCI DATA Register Six (DATA6)
PCI
OnNow
OnNow
OnNow
OnNow Miscellaneous
Alias Register
Alias Register
Alias Register
(DATA3) Alias Register
Alias Register
Alias Register
Alias Register
(DATA7) Alias Register
Register 1
Register 2
Register 3
DATA
DATA
Pattern
Pattern
Pattern
Register
Register
Matching
Matching
Matching
Seven
Three
Am79C972
EEPROM MAP
The automatic EEPROM read operation will access 34
words (i.e., 68 bytes) of the EEPROM. The format of
the EEPROM contents is shown in Table 10 (next
page), beginning with the byte that resides at the low-
est EEPROM address.
Note: The first bit out of any word location in the EE-
PROM is treated as the MSB of the register being pro-
grammed. For example, the first bit out of EEPROM
word location 09h will be written into BCR4, bit 15; the
second bit out of EEPROM word location 09h will be
written into BCR4, bit 14, etc.
There are two checksum locations within the EE-
PROM. The first checksum will be used by AMD driver
software to verify that the ISO 8802-3 (IEEE/ANSI
802.3) station address has not been corrupted. The
value of bytes 0Ch and 0Dh should match the sum of
bytes 00h through 0Bh and 0Eh and 0Fh. The second
checksum location (byte 43h) is not a checksum total,
but is, instead, a checksum adjustment. The value of
this byte should be such that the total checksum for the
entire 68 bytes of EEPROM data equals the value FFh.
The checksum adjust byte is needed by the Am79C972
controller in order to verify that the EEPROM content
has not been corrupted.
LED Support
The Am79C972 controller can support up to four LEDs.
LED outputs LED0, LED1, and LED2 allow for direct
connection of an LED and its supporting pullup device.
In applications that want to use the pin to drive an LED
and also have an EEPROM, it might be necessary to
buffer the LED3 circuit from the EEPROM connection.
When an LED circuit is directly connected to the
EEDO/LED3/SRD pin, then it is not possible for most
EEPROM devices to sink enough I
low level on the EEDO input to the Am79C972 control-
ler. Use of buffering can be avoided if a low power LED
is used.
Each LED can be programmed through a BCR register
to indicate one or more of the following network status
or activities: Collision Status, Full-Duplex Link Status,
Half-Duplex Link Status, Receive Match, Receive Sta-
tus, Magic Packet, Disable Transceiver, and Transmit
Status.
OL
to maintain a valid