am79c972b Advanced Micro Devices, am79c972b Datasheet - Page 19

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am79c972b

Manufacturer Part Number
am79c972b
Description
Pcnet?-fast+ Enhanced 10/100 Mbps Pci Ethernet Controller With Onnow Support
Manufacturer
Advanced Micro Devices
Datasheet

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larity is programmed to active HIGH, the output is a
totem pole driver.
Note: The LED1 pin is multiplexed with the EESK and
SFBD pins.
The LED1 pin is also used during EEPROM Auto-
Detection to determine whether or not an EEPROM is
present at the Am79C972 controller interface. At the
last rising edge of CLK while RST is active LOW, LED1
is sampled to determine the value of the EEDET bit in
BCR19. It is important to maintain adequate hold time
around the rising edge of the CLK at this time to ensure
a correctly sampled value. A sampled HIGH value
means that an EEPROM is present, and EEDET will be
set to 1. A sampled LOW value means that an EE-
PROM is not present, and EEDET will be set to 0. See
the EEPROM Auto-Detection section for more details.
If no LED circuit is to be attached to this pin, then a pull
up or pull down resistor must be attached instead in
order to resolve the EEDET setting.
WARNING: The input signal level of LED1 must be
insured for correct EEPROM detection before the
deassertion of RST.
LED2
LED2
This output is designed to directly drive an LED. This
pin can be programmed to indicate various network
status (see BCR6). The LED2 pin polarity is program-
mable, but by default it is active LOW. When the LED2
pin polarity is programmed to active LOW, the output is
an open drain driver. When the LED2 pin polarity is pro-
grammed to active HIGH, the output is a totem pole
driver.
Note: The LED2 pin is multiplexed with the SRDCLK
pin and the MIIRXFRTGE pins.
LED3
LED3
This output is designed to directly drive an LED. By de-
fault, LED3 indicates transmit activity on the network.
This pin can also be programmed to indicate other net-
work status (see BCR7). The LED3 pin polarity is pro-
grammable, but by default it is active LOW. When the
LED3 pin polarity is programmed to active LOW, the
output is an open drain driver. When the LED3 pin po-
larity is programmed to active HIGH, the output is a
totem pole driver.
Special attention must be given to the external circuitry
attached to this pin. When this pin is used to drive an
LED while an EEPROM is used in the system, then
buffering maybe required between the LED3 pin and
the LED circuit. If an LED circuit were directly attached
to this pin, it may create an I
not be met by the serial EEPROM attached to this pin.
OL
requirement that could
Output
Output
Am79C972
If no EEPROM is included in the system design or low
current LEDs are used, then the LED3 signal may be
directly connected to an LED without buffering. For
more details regarding LED connection, see the sec-
tion on LED Support.
Note: The LED3 pin is multiplexed with the EEDO,
SRD, MIIRXFRTGD pins.
PG
Power Good
The PG pin has two functions: (1) it puts the device into
Magic Packet™ mode, and (2) it blocks any resets
when the PCI bus power is off.
When PG is LOW and either MPPEN or MPMODE is
set to 1, the device enters the Magic Packet mode.
When PG is LOW, a LOW assertion of the PCI RST pin
will only cause the PCI interface pins (except for PME)
to be put in the high impedance state. The internal logic
will ignore the assertion of RST.
When PG is HIGH, assertion of the PCI RST pin
causes the controller logic to be reset and the configu-
ration information to be loaded from the EEPROM.
PG input should be kept high during the NAND tree
testing.
RWU
Remote Wake Up
RWU is an output that is asserted either when the con-
troller is in the Magic Packet mode and a Magic Packet
frame has been detected, or the controller is in the Link
Change Detect mode and a Link Change has been de-
tected.
This pin can drive the external system management
logic that causes the CPU to get out of a low power
mode of operation. This pin is implemented for designs
that do not support the PME function.
Three bits that are loaded from the EEPROM into
CSR116 can program the characteristics of this pin:
1. RWU_POL determines the polarity of the RWU sig-
2. If RWU_GATE bit is set, RWU is forced to the high
3. RWU_DRIVER determines whether the output is
The internal power-on-reset signal forces this output
into the high impedance state until after the polarity and
drive type have been determined.
WUMI
Wake-Up Mode Indicator
This output, which is capable of driving an LED, is as-
serted when the device is in Magic Packet mode. It can
nal.
impedance state when PG input is LOW.
open drain or totem pole.
Output
Output
Input
19

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