bt8960 Mindspeed Technologies, bt8960 Datasheet - Page 89

• Manufacturer Part Number: bt8960
• Description: Bt8960, Single-chip 2b1q Transceiver
• Manufacturer: Mindspeed Technologies

Bt8960
Single-Chip 2B1Q Transceiver
4.6 Microcomputer Interface Timing
Table 4-13. Microcomputer Interface Timing Requirements
Notes: (1). Address is defined as AD[7:0] when MUXED = 1, and ADDR[7:0] when MUXED = 0.
Symbol
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
(2). In Intel mode, Write Strobe is defined as WR and CS asserted. In Motorola mode, it is defined as DS and CS asserted
(3). In Intel mode, Read Strobe is defined as RD and CS asserted. In Motorola mode, it is defined as DS and CS asserted
(4). Parameter 38 is –27 ns only if separate address and data busses are used (i.e., muxed = 0). If muxed = 1, then parameter
(5). The timing listed is for the synchronous mode of the MCI. It can also be set to synchronous mode by setting bit 0 of the
ALE Pulse-Width High
Address Setup prior to ALE Falling Edge
Address Hold after ALE Low
ALE low prior to Write Strobe Falling Edge
ALE low prior to Read Strobe Falling Edge
Write Strobe Pulse-Width Low
Read Strobe Pulse-Width Low
Data In Setup prior to Write Strobe Rising Edge
Data In Hold after Write Strobe High
R/W Setup prior to Read/Write Strobe Falling Edge
R/W Hold after Read/Write Strobe High
ALE Falling Edge after Write Strobe High
ALE Falling Edge after Read Strobe High
RST Pulse-Width Low
Write Strobe Rising Edge after READY low
when R/W is low.
when R/W is high.
38 is 20 ns.
reserved2 register (address 0x0F) to a 1. In this case the minimum timing changes to 40 us for symbol 39, and 50 us
for symbols 40 and 50. Synchronous mode is preferred because it reduces internal switching noise, however no signif-
icant performance degradation has been measured as a result of using the asynchronous mode.
(1)
Parameter
(3,5)
(2,5)
(2)
(1)
(3,4)
(2)
N8960DSB
(2)
4.0 Electrical & Mechanical Specifications
2*Tmclk +25
2*Tmclk +25
Minimum
–27
30
12
20
30
10
10
20
20
50
5
5
0
4.6 Microcomputer Interface Timing
Maximum
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
79