bt8960 Mindspeed Technologies, bt8960 Datasheet - Page 35

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bt8960

Manufacturer Part Number
bt8960
Description
Bt8960, Single-chip 2b1q Transceiver
Manufacturer
Mindspeed Technologies
Datasheet

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Bt8960
Single-Chip 2B1Q Transceiver
2.2.6.2 Peak Detector
2.2.6.3 Error Signals
2.2.6.4 Scrambler
Module
(PKD)
The PKD is only used during the two-level transmission part of startup. It oper-
ates on the echo-free signal. A signal is detected to be a +3, if it is higher than
both of its neighbors, or a –3, if it is lower than both of its neighbors. If neither of
the peaked conditions exists, the output of the slicer is used.
The detector computes two error signals for use in the equalizer: a 16-bit slicer
and a 16-bit equalizer.
The scrambler may operate as either a scrambler or as a descrambler. The scram-
bler block is used during the scrambled-ones part of the startup sequence. This
provides an error-free signal for equalizer adaptation. This scrambler is essen-
tially a 23-bit-long LFSR with feedback. The feedback point depends on whether
the transceiver is being used in a central-office or remote-terminal application.
symbol is converted to a bit stream, as shown in Table 2-4 for the two-level case.
Table 2-4. Two-Level Symbol-to-Bit Conversion
level case.
Table 2-5. Four-Level Symbol-to-Bit Conversion
When operating as a descrambler, the input source is the detector output. The
The symbol is converted to a bit stream, as shown in Table 2-5 for the four-
Input Symbol
–3
–1
+1
+3
Input Symbol
–3
+3
N8960DSB
First Output Bit
(sign)
0
0
1
1
2.0 Functional Description
Output Bit
Second Output Bit
0
1
(magnitude)
2.2 Receive Section
1
0
0
1
25

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