tmp89fm82 TOSHIBA Semiconductor CORPORATION, tmp89fm82 Datasheet - Page 41
tmp89fm82
Manufacturer Part Number
tmp89fm82
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM82.pdf
(452 pages)
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RA000
2.3.5.1
2.3.5.2
loop:
PMD and PLL.
The control flow and the program example are shown as follows.
The following is the program example from the start of PLL to beginning of the operation of PMD.
When shift to the low-power consumption modes other than IDLE1 and 2, switch the modes after stopping
The control flow and the program example are shown as follows.
PLL start
PLL stop
LD
LD
LD
AND
CMP
JP
LD
LD
:
LD
(PLLCR0),0x06
(PLLCR1),0x80
A, (PLLCR1)
A, 0xC0
A, 0xC0
NZ, loop
(PLLCR0),0x07
(POFFCR4),0x10
:
(MDCRA),0x01
Figure 2-7 The control flow of PLL start
Figure 2-8 The control flow of PLL stop
PWM waveform arithmetic circuit
Disable for clock output to PWM
Shift to low power consumption mode
PLL operation stop
Clear lock-up counter
Setting the counter value for
Enable fx output to PMD
Wait for PLL stable time
Enable PMD function
Page 25
PLL starts
; Set the lock-up count value to 2
; Start the operation of clock multiplier and lock-up counter
; Read PLLCR1
; PLLCR1<LUPFG>=1 ?
; Poll until finish of Lock-up
; supply a clock to PMD
; Enable PMD to operate by setting <PMD1EN> to "1"
; Set PMD to start operation
; Set <PWMEN> to "1" and enable PWM wave generation circuit to operate
PLL stable time
stop
10
TMP89FM82
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