tmp89fm82 TOSHIBA Semiconductor CORPORATION, tmp89fm82 Datasheet - Page 316
tmp89fm82
Manufacturer Part Number
tmp89fm82
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM82.pdf
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19.5
Three-phase PWM Output Unit
RA000
19.5.1.2
Timer 1 interrupt INTTMR1
Timer 2 interrupt INTTMR2
set in this register are divided into two, one for selecting the synchronizing signal (MDOUT<SYNCS>) for
port output, and one for setting up port output. The synchronizing signal can be selected from Timers 1 or 2,
position detection signal, or without sync. Port output can be synchronized further to the PWM signal sync
(MDOUT<PSYNC>) with this synchronizing signal. The MDOUT Register's synchronizing signal select bit
becomes effective immediately after writing. Other bits are dual-buffered, and are updated by the selected
synchronizing signal (MDOUT<PSYNC>, <SYNCS> bit 11,7,6).
using (MDCRA<POLH>, <POLL>). Furthermore, the U, V, and W phases can individually be selected ether
PWM output or H/L output by using (MDOUT<UPWM,VPWM,WPWM>, <UOC,VOC,WOC>). When
PWM output is selected, PWM waveforms are output; when H/L output is selected, a waveform which is
fixed high or low is output. (MDOUT<PDEXP>) 3bits set the expected position signal value for the position
detection circuit.
PWM synchronizing clock
Output ports are controlled based on the contents set in the PMD Output Register (MDOUT). The contents
High side and Low side of 3 phase 6 output ports can be set active high or active low independently by
Commutation control circuit
Position detection
interrupt INTPDC
MDOUT sync
fcgck
Figure 19-11 Commutation Control Circuit
PWMU
PWMV
PWMW
Selector
Selector
S
S
Page 300
Set
control
Gate
−
Reset
−, −, −
PMD output register
11
10,9, 8 7, 6
3
MDOUT
2
5, 4, 3, 2, 1, 0
Latch
6
TMP89FM82
u
x
v
y
w
z
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