mpc5644a Freescale Semiconductor, Inc, mpc5644a Datasheet - Page 64

• Manufacturer Part Number: mpc5644a
• Description: Mpc5644a Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

PCS_B[1:5]
PCS_C[1:5]
PCS_D[1:5]
SCK_B
SCK_C
SCK_D
SIN_B
SIN_C
SIN_D
SOUT_B
SOUT_C
SOUT_D
ADDR[10:31]
ALE
BDIP
CS[0:3]
DATA[0:31]
OE
Signal
DSPI_B - DSPI_D
DSPI_B - DSPI_D
DSPI_B - DSPI_D
DSPI_B - DSPI_D
EBI
EBI
EBI
EBI
EBI
EBI
Module or Function
Table 5. Signal details (continued)
Peripheral chip select when device is in master mode—not used
in slave mode
DSPI clock—output when device is in master mode; input when
in slave mode
DSPI data in
DSPI data out
The ADDR[10:31] signals specify the physical address of the bus
transaction.
The 26 address lines correspond to bits 3-31 of the EBI’s 32-bit
internal address bus.
ADDR[15:31] can be used as Address and Data signals when
configured appropriately for a multiplexed external bus. This
allows 32-bit data operations, or 16-bit data operations without
using DATA[0:15] signals.
The Address Latch Enable (ALE) signal is used to demultiplex
the address from the data bus. It is asserted while the least
significant 16 bits of the address are present in the multiplexed
address/data bus.
BDIP is asserted to indicate that the master is requesting
another data beat following the current one.
CSx is asserted by the master to indicate that this transaction is
targeted for a particular memory bank on the Primary external
bus.
The DATA[0:31] signals contain the data to be transferred for the
current transaction.
OE is used to indicate when an external memory is permitted to
drive back read data. External memories must have their data
output buffers off when OE is negated. OE is only asserted for
chip-select accesses.
Description