mpc5644a Freescale Semiconductor, Inc, mpc5644a Datasheet

mpc5644a

Manufacturer Part Number

mpc5644a

Description

Mpc5644a Microcontroller Data Sheet

Manufacturer

Freescale Semiconductor, Inc

Datasheet

1.MPC5644A.pdf (142 pages)

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Freescale Semiconductor

Data Sheet: Advance Information

MPC5644A Microcontroller

Data Sheet

• 150 MHz e200z4 Power Architecture core

• Memory organization

• Fail Safe Protection

• Interrupts

• Serial channels

• 1  eMIOS

• 1  eTPU2 (second generation eTPU)

• 2 enhanced queued analog-to-digital converters (eQADCs)

Preliminary—Subject to Change Without Notice

This document contains information on a product under development. Freescale reserves the

right to change or discontinue this product without notice.

– Variable length instruction encoding (VLE)

– Superscalar architecture with 2 execution units

– Up to 2 integer or floating point instructions per cycle

– Up to 4 multiply and accumulate operations per cycle

– 4 MB on-chip flash memory with ECC and Read While

– 192 KB on-chip RAM with standby functionality

– 8 KB instruction cache (with line locking), configurable

– 14 + 3 KB eTPU code and data RAM

– 5  4 crossbar switch (XBAR)

– 24-entry MMU

– External Bus Interface (EBI) with slave and master port

– 16-entry Memory Protection Unit (MPU)

– CRC unit with 3 sub-modules

– Junction temperature sensor

– Configurable interrupt controller (with NMI)

– 64-channel DMA

– 3  eSCI

– 3  DSPI (2 of which support downstream Micro

– 3  FlexCAN with 64 messages each

– 1  FlexRay module (V2.1) up to 10 Mbit/s with dual or

– 24 unified channels

– 32 standard channels

– 1  reaction module (6 channels with three outputs per

Write (RWW)

(32 KB) and ECC

as 2- or 4-way

Second Channel [MSC])

single channel and 128 message objects and ECC

channel)

• On-chip CAN/SCI/FlexRay Bootstrap loader with Boot

• Nexus

• JTAG (5-pin)

• Development Trigger Semaphore (DTS)

• Clock generation

• Up to 120 general purpose I/O lines

• Power reduction mode: slow, stop and stand-by modes

• Flexible supply scheme

• Packages

– Forty 12-bit input channels (multiplexed on 2 ADCs);

– 6 command queues

– Trigger and DMA support

– 688 ns minimum conversion time

Assist Module (BAM)

– Class 3+ for the e200z4 core

– Class 1 for the eTPU

– Register of semaphores (32-bits) and an identification

– Used as part of a triggered data acquisition protocol

– EVTO pin is used to communicate to the external tool

– On-chip 4–40 MHz main oscillator

– On-chip FMPLL (frequency-modulated phase-locked

– Individually programmable as input, output or special

– Programmable threshold (hysteresis)

– 5 V single supply with external ballast

– Multiple external supply: 5 V, 3.3 V and 1.2 V

– 176 LQFP

– 208 MAPBGA

– 324 TEPBGA

– 496-pin CSP (calibration tool only)

expandable to 56 channels with external multiplexers

loop)

function

176 LQFP

24 mm x 24 mm

324 TEPBGA

23 mm x 23 mm

MPC5644A

Document Number: MPC5644A

Rev. 4, 09/2010

208 MAPBGA

17 mm x 17 mm

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