mpc5644a Freescale Semiconductor, Inc, mpc5644a Datasheet - Page 120

• Manufacturer Part Number: mpc5644a
• Description: Mpc5644a Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

Electrical characteristics
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The actual minimum SCK cycle time is limited by pad performance.
For DSPI channels using LVDS output operation, up to 40 MHz SCK cycle time is supported. For non-LVDS output,
maximum SCK frequency is 20 MHz. Appropriate clock division must be applied.
The maximum value is programmable in DSPI_CTARx[PSSCK] and DSPI_CTARx[CSSCK].
Timing met when pcssck = 3(01), and cssck =2 (0000).
The maximum value is programmable in DSPI_CTARx[PASC] and DSPI_CTARx[ASC].
Timing met when ASC = 2 (0000), and PASC = 3 (01).
Timing met when pcssck = 3.
Timing met when ASC = 3.
This number is calculated assuming the SMPL_PT bitfield in DSPI_MCR is set to 0b10.
SCK Output
(CPOL=1)
SCK Output
(CPOL=0)
SOUT
SIN
PCSx
Figure 23. DSPI classic SPI timing - master, CPHA = 0
Preliminary—Subject to Change Without Notice
MPC5644A Microcontroller Data Sheet, Rev. 4
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