xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 92

• Manufacturer Part Number: xc3s1400an
• Description: Spartan-3an Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Pinout Descriptions
Table 72: Spartan-3AN FGG484 Pinout (Continued)
92
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L42N_3
IO_L42P_3
IO_L43N_3
IO_L43P_3
IO_L44N_3
IO_L44P_3
IO_L45N_3
IO_L45P_3
IP_3/VREF_3
IP_3/VREF_3
IP_L04N_3/VREF_3
IP_L04P_3
IP_L11N_3
IP_L11P_3
IP_L15N_3/VREF_3
IP_L15P_3
IP_L19N_3
IP_L19P_3
IP_L23N_3
IP_L23P_3
IP_L27N_3
IP_L27P_3
IP_L31N_3
IP_L31P_3
IP_L35N_3
IP_L35P_3
IP_L39N_3
IP_L39P_3
IP_L46N_3/VREF_3
IP_L46P_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Name
FG484
AA11
AA16
AB22
AA2
AA1
AA7
AB1
Ball
A22
B12
B16
C20
W2
W1
W3
M8
M6
M7
V4
Y2
Y1
R6
H7
H8
K8
K7
N9
N8
N5
N6
P8
N7
R8
P7
R7
E2
N2
P6
V2
A1
B7
C3
J8
J7
L8
L7
T6
J2
J6
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
VREF
VREF
VREF
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
Table 72: Spartan-3AN FGG484 Pinout (Continued)
VCCAUX DONE
VCCAUX PROG_B
VCCAUX TCK
VCCAUX TDI
VCCAUX TDO
VCCAUX TMS
VCCAUX VCCAUX
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Name
DS557-4 (v3.1) June 2, 2008
Product Specification
FG484
W10
W14
M10
M12
M14
M21
Ball
D14
G21
K10
K12
N11
N13
P10
P14
P19
U17
Y20
Y19
A21
E19
D12
F11
F17
L11
L13
L17
T12
T21
J11
J13
J14
J19
D9
G2
P4
P9
U6
Y3
C4
D4
F6
L2
L6
L9
T2
F5
J4
J9
VCCAUX
CONFIG
CONFIG
JTAG
JTAG
JTAG
JTAG
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R