xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 15

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xc3s1400an

Manufacturer Part Number
xc3s1400an
Description
Spartan-3an Fpga Family Data Sheet
Manufacturer
Xilinx Corp.
Datasheet

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Quiescent Current Requirements
Table 10: Spartan-3AN FPGA Quiescent Supply Current Characteristics
DS557-3 (v3.1) June 2, 2008
Product Specification
Notes:
1.
2.
3.
4.
5.
I
Symbol
I
CCAUXQ
CCINTQ
I
CCOQ
The numbers in this table are based on the conditions set forth in
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. The internal SPI Flash is deselected (CSB = High); the internal SPI Flash current is consumed on the V
values are characterized using typical devices at ambient room temperature (T
The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage limits with
V
functional elements instantiated). For conditions other than those described above (for example, a design including functional elements),
measured quiescent current levels will be different than the values in the table.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3AN FPGA XPower Estimator
XPower Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates. For more information on
power for the In-System Flash memory, see the Power Management chapter of UG333.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
For information on the power-saving Suspend mode, see XAPP480: Using Suspend Mode in Spartan-3 Generation FPGAs. Suspend mode
typically saves 40% total power consumption compared to quiescent current.
CCINT
= 1.26V, V
R
Quiescent V
Quiescent V
Quiescent V
CCO
Description
CCINT
CCO
CCAUX
= 3.6V, and V
supply current
supply current
supply current
CCAUX
provides quick, approximate, typical estimates, and does not require a netlist of the design, and b)
= 3.6V. The FPGA is programmed with a “blank” configuration data file (that is, a design with no
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
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XC3S700AN
XC3S1400AN
XC3S50AN
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XC3S1400AN
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Table
8.
Typical
10.1
0.2
0.2
0.3
0.3
0.3
3.1
5.1
5.1
6.1
A
10
13
24
2
7
of 25°C at V
(2)
CCINT
Commercial
Maximum
12.1
18.1
28.1
50.1
DC and Switching Characteristics
120
220
8.1
= 1.2V, V
20
50
85
2
2
3
3
3
(2)
CCO
= 3.3V, and V
Maximum
Industrial
CCAUX
10.1
15.1
24.1
34.1
58.1
125
185
310
30
70
3
3
4
4
4
supply rail. Typical
(2)
CCAUX
= 3.3V).
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
15

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