dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 48

• Manufacturer Part Number: dsp56167
• Description: Advance Information 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

Specifications
Bus Arbitration Timing—Master Mode
BUS ARBITRATION TIMING—MASTER MODE
V
2-22
DD
No.
85
86
87
88
89
90
91
92
93
= 5.0 V 10%; TJ = –40 to +115˚C; CL = 50 pF + 1 TTL load
CLKO high to BR Output Valid
BG Input Valid to CLKO Low (Setup)
CLKO Low to BG Input Deassertion (Hold)
CLKO Low to BB Input Deassertion (Hold)
CLKO High to BB Output Assertion
CLKO Low to BG Input Assertion
BG Deassertion to BB Deassertion
BG Deassertion to Address/Data/Control lines tri-stated
BB Input Deassertion to CLKO Low (Setup)
No external access by the DSP
External read or write access
No external access by the DSP
External read or write access
External read-modify-write-access
Stop mode - external bus released and BG asserted
Wait mode
No external access by the DSP
External read or write access
External read-modify-write-access
Stop mode - external bus released and BG asserted
Wait mode
Table 2-11 Master Mode Bus Arbitration Timing
Characteristics
DSP56167/D, Rev. 1
Min
53.3
69.9
1.9
2.0
2.0
2.0
—
—
—
—
—
—
—
—
—
—
—
3
60 MHz
Max
11.4
48.3
64.9
MOTOROLA
9.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns