dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 24

• Manufacturer Part Number: dsp56167
• Description: Advance Information 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

Signal/Pin Descriptions
On-Chip Emulation Port
On-CHIP EMULATION PORT
1-18
Signal Name
DSI/OS0
DSCK/OS1
DSO
Output
Output
Output
Input/
Input/
Signal
Type
Table 1-14 On-Chip Emulation (OnCE) Port Signals
Output
Output
during
Pulled
Reset
State
Low
Low
high
Debug Serial Input/Chip Status 0—Serial data or commands
are provided to the OnCE controller through the DSI/OS0 signal
when it is an input. The data received on the DSI signal will be
recognized only when the DSP has entered the Debug mode of
operation. Data is latched on the falling edge of the DSCK serial
clock. Data is always shifted into the OnCE serial port Most
Significant Bit (MSB) first. When the DSI/OS0 signal is an
output, it works in conjunction with the OS1 signal to provide
chip status information. The DSI/OS0 signal is an output when
the processor is not in Debug mode. When switching from
output to input, the signal is tri-stated.
Debug Serial Clock/Chip Status 1—The DSCK/OS1 signal
supplies the serial clock to the OnCE port when it is an input.
The serial clock provides pulses required to shift data into and
out of the OnCE serial port. (Data is clocked into the OnCE port
on the falling edge and is clocked out of the OnCE serial port on
the rising edge.) The debug serial clock frequency must be no
greater than
switching from input to output, the signal is tri-stated.
When it is an output, this signal works with the OS0 signal to
provide information about the chip status. The DSCK/OS1 signal
is an output when the chip is not in Debug mode.
Debug Serial Output—Data contained in one of the OnCE port
controller registers is provided through the DSO output signal,
as specified by the last command received from the external
command controller. Data is always shifted out the OnCE serial
port MSB first. Data is clocked out of the OnCE serial port on the
rising edge of DSCK.
The DSO signal also provides acknowledge pulses to the
external command controller. When the chip enters the Debug
mode, the DSO signal will be pulsed low to indicate
(acknowledge) that the OnCE is waiting for commands. After
the OnCE receives a read command, the DSO signal will be
pulsed low to indicate that the requested data is available and
the OnCE serial port is ready to receive clocks in order to deliver
the data. After the OnCE receives a write command, the DSO
signal will be pulsed low to indicate that the OnCE serial port is
ready to receive the data to be written; after the data is written,
another acknowledge pulse will be provided.
DSP56167/D, Rev. 1
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of the processor clock frequency. When
Signal Description
MOTOROLA