dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 3

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dsp56167

Manufacturer Part Number
dsp56167
Description
Advance Information 16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
FEATURES
MOTOROLA
• Digital Signal Processing Core
• Memory
Up to 30 Million Instructions Per Second (MIPS) at 60 MHz with
33.3 ns instruction cycle
Single-cycle 16 16-bit parallel Multiply-Accumulate
2 40-bit accumulators with extension byte
Fractional and integer arithmetic with support for multiprecision
arithmetic
Highly parallel instruction set with unique DSP addressing modes
Nested hardware DO loops including infinite loops and DO zero loop
Two instruction LMS adaptive filter loop
Fast auto-return interrupts
Three external interrupt request pins
Three 16-bit internal data and three 16-bit internal address buses
Individual programmable wait states on the external bus for program,
data, and peripheral memory spaces
Programmable absolute short addressing mode
Off-chip memory-mapped peripheral space with programmable access
time and separate peripheral enable pin
Peripheral Address Generation Unit (PAGU)
On-chip memory-mapped peripheral registers
On-Chip Emulation (OnCE ) port for unobtrusive, processor speed-
independent debugging with DR line static latch with Reset
Modified Harvard architecture permits simultaneous accesses to program
and data memories
2 K 16-bit on-chip Program RAM
4 K 16-bit on-chip data RAM
64 16-bit bootstrap ROM
External memory expansion with 16-bit address and data buses with static
latches with Reset and software-controlled BG pull-down
Bootstrap loading from external byte-wide Program ROM, Host Interface,
or 16-bit Synchronous Serial Interface (SSI0)
DSP56167/D, Rev. 1
Features
iii

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