dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 104

• Manufacturer Part Number: dsp56167
• Description: Advance Information 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

Design Considerations
Special Design Considerations for Conversions from DSP56166 to DSP56167
4-28
PORT A BG PULL-DOWN UNDER SOFTWARE CONTROL
(BCR2[15]) = 0
(default)
(BCR2[15]) = 1
After the BG pin is initialized high during hardware reset in bus Master Mode, the
BG pin can be optionally pulled low by setting Bus Grant Pull Down bit (BGPD) in
the Bus Control Register (BCR[13]). This allows the DSP to become the permanent
bus master while in bus Master Mode without having to add an external pull-up
resistor. When BGPD is cleared, BG retains the last logic state that was driven by
either the DSP or by an external bus master.
Note: BGPD is cleared by the hardware reset allowing BG to be pulled up as the
DSP56167
default state so as not to interfere with any existing bus design.
A[15:0]
BR
PEREN
BR
PEREN
Figure 4-17 External Chip Select Operation
PEREN
DSP56167/D, Rev. 1
BR
RAM Access
Peripheral
Memory
Peripheral Access
MOTOROLA