adsp-21535 STMicroelectronics, adsp-21535 Datasheet - Page 9
adsp-21535
Manufacturer Part Number
adsp-21535
Description
Dsm Digital Signal Processor System Memory For Analog Devices Dsps 3.3v Supply
Manufacturer
STMicroelectronics
Datasheet
1.ADSP-21535.pdf
(73 pages)
- Current page: 9 of 73
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Pin Name Type
PE0-7
PF0-7
PG0-7
V
GND
CC
I/O
I/O
I/O
Eight configurable Port E signals with the following functions:
–
–
–
–
Note 1: PE0-PE7 may be configured at run-time as either standard CMOS or Open Drain Outputs.
Note 2: The JTAG ISP pins may be multiplexed with other I/O functions.
Port F connects to eight data bus signals, D0 - D7 from DSP.
Port G connects to eight data bus signals, D8 - D15 from DSP if 16-bit data path is used.
Otherwise, PG0-PG7 can be used for general purpose MCU I/O pins.
Note: PG0-PG7 may be configured at run-time as standard CMOS or Open Drain Outputs.
Supply Voltage
Ground pins
MCU I/O – DSP may write or read pins directly at runtime with csiop registers.
PE0, PE1, PE2, and PE3 can form the JTAG IEEE-1149.1 ISP serial interface as signals TMS,
TCK, TDI, and TDO respectively.
PE4 and PE5 can form the enhanced JTAG signals TSTAT and TERR respectively. Reduces
ISP programming time up to 30% when used in addition to the standard four JTAG signals: TDI,
TDO, TMS, TCK.
PE4 can be configured as the Ready/Busy output to indicate Flash memory programming
status during parallel programming. May be polled by DSP or used as DSP interrupt.
Description
DSM2150F5V
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