MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 3

• Manufacturer Part Number: MT92220BG
• Description: Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
• Manufacturer: Zarlink Semiconductor

Data Sheet
Color Code
In this document, the following color code is used:
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Document Organization
This data sheet is divided into the following sections:
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Register List and Memory Map are contained in the MT92220 Design Manual.
Fields in red are initialized by software when the structure is created, and are written back by the hardware.
Fields in black are initialized by software when the structure is created, and are never written back by the
hardware.
Fields in dark yellow are initialized by software when the structure is created and are written back at the
same value by the
CPU Interface (Chapter 2.0) describes the main external interface of the MT92220 chip.
Network Interface (Chapter 3.0) describes the interface to the 3 different types of link interfaces, Ethernet,
UTOPIA, and Packet over SONET, that are supported.
Link Layers (Chapter 4.0) describes the 3 different types of link layers, Ethernet, ATM AAL5, and Packet
over SONET, that are supported.
RX/TX Data Flows (Chapter 5.0) describes the data flows for all packets received and transmitted.
Packet Identification (Chapter 6.0) describes the process by which packets are identified.
TX/RX AAL2 VC Treatment (Chapter 7.0) describes the treatment of AAL2 mini-packets and cells as they
are transmitted and received from the network.
Packet Assembly (Chapter 8.0) describes the collected bytes written in the circular buffers by the TX TDM,
and how they are assembled into RTP or AAL2 packets.
Packet Disassembly (Chapter 9.0) describes how RTP and AAL2 packets are transformed into PCM bytes,
ADPCM samples, or HDLC/CPU-destined mini-packets.
TX/RX TDM Data Paths (Chapter 10.0) describes the data paths for all bytes transmitted and received with
the H.110 interface.
H.110 Interface (Chapter 11.0) describes the compatibility of the TDM interface with the H.110 bus.
Clocking (Chapter 12.0) describes the clocks used for the Network Interface and the SAR portion of the
device.
Pin-out is in Chapter 13.0.
Electrical Characteristics (Chapter 14.0) describes the electrical characteristics of all the interfaces.
This shade denotes a Reserved Field.
This shade denotes an Unimplemented Field.
The field outlined in red is only written back by the chip when one of the bits,
contained within the field and in red, was set and will then be cleared by the
chip when it is done acting upon the set request bit.
hardware.
Zarlink Semiconductor Inc.
MT92220
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