MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 142

• Manufacturer Part Number: MT92220BG
• Description: Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
• Manufacturer: Zarlink Semiconductor

142
In RTP, the HDLC Address LUT Structure contains a pointer to a TX Connection Structure, as well as a TI
(Timestamp Insert) bit. When this bit is ‘1’, this chip will insert its own timestamp, adding the one contained in the
HDLC packet to the final timestamp. When ‘0’, the timestamp in the HDLC packet will be used as-is.
The format of the RTP HDLC Address LUT Structure is the following:
TX Connection Structure
Base for Address
TI
N
Field
+(N-2)*4+0
+(N-2)*4+2
+(N-1)*4+0
+(N-1)*4+2
+0
+4
+6
+2
Base address of the TX Connection Structure that will be used to send HDLC
packets with the address shown. When this field is 0000h, the address is deemed
invalid and the packet is discarded.
Time Stamp Insert. When ‘0’, the time stamp will be inserted in the packet as it is
received in the HDLC packet. When ‘1’, the time stamp in the HDLC packet will be
treated as an offset from the current bus time stamp.
Number of HDLC addresses supported as defined by Add Range in the HDLC
Stream to HDLC Address LUT Structure.
b15
b14
Figure 78 - HDLC Address LUT (RTP)
Table 59 - Fields and Description
TX Connection Structure Base [20:5] for Address = N-2
TX Connection Structure Base [20:5] for Address = N-1
b13
TX Connection Structure Base [20:5] for Address = 0
TX Connection Structure Base [20:5] for Address = 1
b12
Zarlink Semiconductor Inc.
b11
b10
b9
b8
b7
Description
b6
b5
b4
b3
b2
b1
0
0
0
0
b0
TI
TI
TI
TI