MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 164

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MT92220BG

Manufacturer Part Number
MT92220BG
Description
Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
Manufacturer
Zarlink Semiconductor
Datasheet
164
mem_clk_sar_i Counter
Reference Clock Counter
mem_clk_sar_i Cycles Since
Last Reference Clock Rise
LI
UUI
Field
+A
+C
+E
+0
+2
+4
+6
+8
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Figure 98 - Adaptive Clock Recovery RTP Event Structure
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mem_clk_sar_i Cycles Since Last Reference Clock Rise [15:0]
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When an Adaptive Clock Recovery AAL2 Event Structure is generated, the
mem_clk_sar_i free-running counter (the same one as in registers 908h
and 90Ah) is sampled and written in this structure.
When an Adaptive Clock Recovery AAL2 Event Structure is generated, the
free-running counter that counts the rising edges of the clock generator A
module will be sampled and written in this structure.
When the Reference Clock Counter increments infrequently (i.e. the
“generate clock” is low in frequency) this field can be used to approximate
the fraction of a Reference Clock Cycle that can be appended to the
Reference Clock Counter. This field in defined as the number of
mem_clk_sar_i cycles elapsed since the last increment of the Reference
Clock Counter.
LI field of the packet that caused this Adaptive Clock Recovery Event
Structure to be written.
UUI of the packet that caused this Adaptive Clock Recovery Event
Structure to be written.
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Table 69 - Fields and Description
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Reference Clock Counter [31:16]
Reference Clock Counter [15:0]
mem_clk_sar_i Counter [31:16]
RTP Sequence Number [15:0]
mem_clk_sar_i Counter [15:0]
Zarlink Semiconductor Inc.
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RTP Timestamp [31:16]
R TP Ti m est am p [ 15: 0]
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Description
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